Changeset 00aece0 in mainline for kernel/arch
- Timestamp:
- 2012-02-18T16:47:38Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4449c6c
- Parents:
- bd5f3b7 (diff), f943dd3 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch
- Files:
-
- 24 added
- 1 deleted
- 82 edited
- 2 moved
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abs32le/Makefile.inc (modified) (1 diff)
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abs32le/include/mm/frame.h (modified) (1 diff)
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abs32le/include/mm/km.h (added)
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abs32le/src/abs32le.c (modified) (2 diffs)
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abs32le/src/mm/frame.c (modified) (1 diff)
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abs32le/src/mm/km.c (added)
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abs32le/src/mm/page.c (modified) (1 diff)
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amd64/Makefile.inc (modified) (3 diffs)
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amd64/include/arch.h (modified) (1 diff)
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amd64/include/boot/boot.h (modified) (1 diff)
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amd64/include/interrupt.h (modified) (1 diff)
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amd64/include/mm/frame.h (modified) (1 diff)
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amd64/include/mm/km.h (added)
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amd64/src/amd64.c (modified) (5 diffs)
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amd64/src/boot/memmap.c (modified) (1 diff)
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amd64/src/boot/multiboot.S (moved) (moved from kernel/arch/amd64/src/boot/boot.S ) (6 diffs)
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amd64/src/boot/multiboot2.S (added)
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amd64/src/mm/km.c (added)
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amd64/src/mm/page.c (modified) (2 diffs)
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arm32/Makefile.inc (modified) (1 diff)
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arm32/include/mach/integratorcp/integratorcp.h (modified) (1 diff)
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arm32/include/mach/testarm/testarm.h (modified) (1 diff)
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arm32/include/machine_func.h (modified) (2 diffs)
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arm32/include/mainpage.h (deleted)
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arm32/include/mm/frame.h (modified) (1 diff)
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arm32/include/mm/km.h (added)
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arm32/include/mm/page.h (modified) (1 diff)
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arm32/src/arm32.c (modified) (2 diffs)
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arm32/src/mach/gta02/gta02.c (modified) (4 diffs)
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arm32/src/mach/integratorcp/integratorcp.c (modified) (5 diffs)
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arm32/src/mach/testarm/testarm.c (modified) (4 diffs)
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arm32/src/machine_func.c (modified) (1 diff)
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arm32/src/mm/frame.c (modified) (2 diffs)
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arm32/src/mm/km.c (added)
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arm32/src/mm/page.c (modified) (4 diffs)
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arm32/src/ras.c (modified) (3 diffs)
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ia32/Makefile.inc (modified) (2 diffs)
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ia32/include/arch.h (modified) (1 diff)
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ia32/include/boot/boot.h (modified) (1 diff)
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ia32/include/interrupt.h (modified) (1 diff)
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ia32/include/mm/frame.h (modified) (1 diff)
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ia32/include/mm/km.h (added)
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ia32/src/boot/memmap.c (modified) (1 diff)
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ia32/src/boot/multiboot.S (moved) (moved from kernel/arch/ia32/src/boot/boot.S ) (10 diffs)
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ia32/src/boot/multiboot2.S (added)
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ia32/src/boot/vesa_prot.inc (modified) (3 diffs)
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ia32/src/boot/vesa_real.inc (modified) (4 diffs)
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ia32/src/ia32.c (modified) (5 diffs)
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ia32/src/mm/frame.c (modified) (5 diffs)
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ia32/src/mm/km.c (added)
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ia32/src/mm/page.c (modified) (2 diffs)
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ia32/src/smp/ap.S (modified) (4 diffs)
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ia32/src/smp/smp.c (modified) (2 diffs)
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ia64/Makefile.inc (modified) (1 diff)
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ia64/include/arch.h (modified) (1 diff)
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ia64/include/asm.h (modified) (6 diffs)
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ia64/include/interrupt.h (modified) (1 diff)
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ia64/include/legacyio.h (added)
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ia64/include/mm/frame.h (modified) (1 diff)
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ia64/include/mm/km.h (added)
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ia64/include/mm/page.h (modified) (1 diff)
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ia64/src/drivers/ski.c (modified) (1 diff)
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ia64/src/ia64.c (modified) (8 diffs)
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ia64/src/mm/frame.c (modified) (1 diff)
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ia64/src/mm/km.c (added)
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ia64/src/mm/page.c (modified) (1 diff)
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ia64/src/mm/tlb.c (modified) (19 diffs)
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ia64/src/start.S (modified) (4 diffs)
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mips32/Makefile.inc (modified) (1 diff)
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mips32/include/mm/as.h (modified) (1 diff)
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mips32/include/mm/frame.h (modified) (1 diff)
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mips32/include/mm/km.h (added)
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mips32/src/mips32.c (modified) (4 diffs)
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mips32/src/mm/frame.c (modified) (6 diffs)
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mips32/src/mm/km.c (added)
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mips32/src/mm/page.c (modified) (1 diff)
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mips32/src/mm/tlb.c (modified) (1 diff)
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mips64/Makefile.inc (modified) (1 diff)
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mips64/include/mm/frame.h (modified) (1 diff)
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mips64/include/mm/km.h (added)
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mips64/src/mips64.c (modified) (3 diffs)
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mips64/src/mm/frame.c (modified) (6 diffs)
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mips64/src/mm/km.c (added)
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mips64/src/mm/page.c (modified) (1 diff)
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ppc32/Makefile.inc (modified) (1 diff)
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ppc32/include/mm/frame.h (modified) (2 diffs)
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ppc32/include/mm/km.h (added)
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ppc32/src/drivers/pic.c (modified) (2 diffs)
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ppc32/src/mm/frame.c (modified) (4 diffs)
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ppc32/src/mm/km.c (added)
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ppc32/src/mm/page.c (modified) (1 diff)
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ppc32/src/ppc32.c (modified) (4 diffs)
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sparc64/Makefile.inc (modified) (1 diff)
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sparc64/include/mm/km.h (added)
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sparc64/include/mm/sun4u/frame.h (modified) (1 diff)
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sparc64/include/mm/sun4u/km.h (added)
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sparc64/include/mm/sun4v/frame.h (modified) (1 diff)
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sparc64/include/mm/sun4v/km.h (added)
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sparc64/src/drivers/kbd.c (modified) (3 diffs)
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sparc64/src/drivers/pci.c (modified) (3 diffs)
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sparc64/src/mm/page.c (modified) (1 diff)
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sparc64/src/mm/sun4u/frame.c (modified) (1 diff)
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sparc64/src/mm/sun4u/km.c (added)
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sparc64/src/mm/sun4u/tlb.c (modified) (9 diffs)
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sparc64/src/mm/sun4v/frame.c (modified) (1 diff)
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sparc64/src/mm/sun4v/km.c (added)
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sparc64/src/mm/sun4v/tlb.c (modified) (9 diffs)
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sparc64/src/sun4u/sparc64.c (modified) (1 diff)
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sparc64/src/sun4v/sparc64.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/abs32le/Makefile.inc
rbd5f3b7 r00aece0 57 57 arch/$(KARCH)/src/smp/smp.c \ 58 58 arch/$(KARCH)/src/smp/ipi.c \ 59 arch/$(KARCH)/src/mm/km.c \ 59 60 arch/$(KARCH)/src/mm/as.c \ 60 61 arch/$(KARCH)/src/mm/frame.c \ -
kernel/arch/abs32le/include/mm/frame.h
rbd5f3b7 r00aece0 41 41 #include <typedefs.h> 42 42 43 extern void frame_arch_init(void); 43 extern void frame_low_arch_init(void); 44 extern void frame_high_arch_init(void); 44 45 extern void physmem_print(void); 45 46 -
kernel/arch/abs32le/src/abs32le.c
rbd5f3b7 r00aece0 49 49 #include <syscall/syscall.h> 50 50 #include <console/console.h> 51 #include <sysinfo/sysinfo.h>52 51 #include <memstr.h> 53 52 … … 86 85 } 87 86 88 sysarg_t sys_tls_set( sysarg_t addr)87 sysarg_t sys_tls_set(uintptr_t addr) 89 88 { 90 89 return EOK; -
kernel/arch/abs32le/src/mm/frame.c
rbd5f3b7 r00aece0 50 50 51 51 52 void frame_arch_init(void) 52 void frame_low_arch_init(void) 53 { 54 } 55 56 void frame_high_arch_init(void) 53 57 { 54 58 } -
kernel/arch/abs32le/src/mm/page.c
rbd5f3b7 r00aece0 56 56 } 57 57 58 59 uintptr_t hw_map(uintptr_t physaddr, size_t size)60 {61 return physaddr;62 }63 64 58 void page_fault(unsigned int n __attribute__((unused)), istate_t *istate) 65 59 { -
kernel/arch/amd64/Makefile.inc
rbd5f3b7 r00aece0 72 72 ARCH_SOURCES = \ 73 73 arch/$(KARCH)/src/fpu_context.c \ 74 arch/$(KARCH)/src/boot/boot.S \ 74 arch/$(KARCH)/src/boot/multiboot.S \ 75 arch/$(KARCH)/src/boot/multiboot2.S \ 75 76 arch/$(KARCH)/src/boot/memmap.c \ 76 77 arch/$(KARCH)/src/debug/stacktrace.c \ … … 79 80 arch/$(KARCH)/src/context.S \ 80 81 arch/$(KARCH)/src/ddi/ddi.c \ 81 arch/$(KARCH)/src/drivers/vesa.c \82 82 arch/$(KARCH)/src/drivers/i8254.c \ 83 83 arch/$(KARCH)/src/drivers/i8259.c \ … … 86 86 arch/$(KARCH)/src/bios/bios.c \ 87 87 arch/$(KARCH)/src/interrupt.c \ 88 arch/$(KARCH)/src/mm/km.c \ 88 89 arch/$(KARCH)/src/mm/as.c \ 89 90 arch/$(KARCH)/src/mm/frame.c \ -
kernel/arch/amd64/include/arch.h
rbd5f3b7 r00aece0 38 38 #include <genarch/multiboot/multiboot.h> 39 39 40 extern void arch_pre_main(uint32_t, const multiboot_info_t*);40 extern void arch_pre_main(uint32_t, void *); 41 41 42 42 #endif -
kernel/arch/amd64/include/boot/boot.h
rbd5f3b7 r00aece0 40 40 #define BOOT_STACK_SIZE 0x000400 41 41 42 #define MULTIBOOT_HEADER_MAGIC 0x1BADB00243 #define MULTIBOOT_HEADER_FLAGS 0x0001000344 45 42 #ifndef __ASM__ 46 43 -
kernel/arch/amd64/include/interrupt.h
rbd5f3b7 r00aece0 55 55 #define IRQ_PIC_SPUR 7 56 56 #define IRQ_MOUSE 12 57 #define IRQ_NE2000 958 57 59 58 /* This one must have four least significant bits set to ones */ -
kernel/arch/amd64/include/mm/frame.h
rbd5f3b7 r00aece0 43 43 #include <typedefs.h> 44 44 45 extern uintptr_t last_frame;46 extern void frame_ arch_init(void);45 extern void frame_low_arch_init(void); 46 extern void frame_high_arch_init(void); 47 47 extern void physmem_print(void); 48 48 -
kernel/arch/amd64/src/amd64.c
rbd5f3b7 r00aece0 34 34 35 35 #include <arch.h> 36 37 36 #include <typedefs.h> 38 39 #include <config.h> 40 41 #include <proc/thread.h> 42 #include <genarch/multiboot/multiboot.h> 43 #include <genarch/drivers/legacy/ia32/io.h> 44 #include <genarch/drivers/ega/ega.h> 45 #include <arch/drivers/vesa.h> 46 #include <genarch/drivers/i8042/i8042.h> 47 #include <genarch/kbrd/kbrd.h> 37 #include <errno.h> 38 #include <memstr.h> 39 #include <interrupt.h> 40 #include <console/console.h> 41 #include <syscall/syscall.h> 42 #include <sysinfo/sysinfo.h> 43 #include <arch/bios/bios.h> 44 #include <arch/boot/boot.h> 45 #include <arch/debugger.h> 48 46 #include <arch/drivers/i8254.h> 49 47 #include <arch/drivers/i8259.h> 50 #include <arch/boot/boot.h> 48 #include <arch/syscall.h> 49 #include <genarch/acpi/acpi.h> 50 #include <genarch/drivers/ega/ega.h> 51 #include <genarch/drivers/i8042/i8042.h> 52 #include <genarch/drivers/legacy/ia32/io.h> 53 #include <genarch/fb/bfb.h> 54 #include <genarch/kbrd/kbrd.h> 55 #include <genarch/multiboot/multiboot.h> 56 #include <genarch/multiboot/multiboot2.h> 51 57 52 58 #ifdef CONFIG_SMP 53 59 #include <arch/smp/apic.h> 54 60 #endif 55 56 #include <arch/bios/bios.h>57 #include <arch/cpu.h>58 #include <print.h>59 #include <arch/cpuid.h>60 #include <genarch/acpi/acpi.h>61 #include <panic.h>62 #include <interrupt.h>63 #include <arch/syscall.h>64 #include <arch/debugger.h>65 #include <syscall/syscall.h>66 #include <console/console.h>67 #include <ddi/irq.h>68 #include <sysinfo/sysinfo.h>69 #include <memstr.h>70 61 71 62 /** Disable I/O on non-privileged levels … … 101 92 /** Perform amd64-specific initialization before main_bsp() is called. 102 93 * 103 * @param signature Should contain the multiboot signature. 104 * @param mi Pointer to the multiboot information structure. 105 */ 106 void arch_pre_main(uint32_t signature, const multiboot_info_t *mi) 94 * @param signature Multiboot signature. 95 * @param info Multiboot information structure. 96 * 97 */ 98 void arch_pre_main(uint32_t signature, void *info) 107 99 { 108 100 /* Parse multiboot information obtained from the bootloader. */ 109 multiboot_info_parse(signature, mi); 101 multiboot_info_parse(signature, (multiboot_info_t *) info); 102 multiboot2_info_parse(signature, (multiboot2_info_t *) info); 110 103 111 104 #ifdef CONFIG_SMP … … 153 146 154 147 #if (defined(CONFIG_FB) || defined(CONFIG_EGA)) 155 bool vesa= false;148 bool bfb = false; 156 149 #endif 157 150 158 151 #ifdef CONFIG_FB 159 vesa = vesa_init();152 bfb = bfb_init(); 160 153 #endif 161 154 162 155 #ifdef CONFIG_EGA 163 if (! vesa) {156 if (!bfb) { 164 157 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM); 165 158 if (egadev) … … 221 214 } 222 215 } 223 224 /*225 * This is the necessary evil until the userspace driver is entirely226 * self-sufficient.227 */228 sysinfo_set_item_val("i8042", NULL, true);229 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);230 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);231 sysinfo_set_item_val("i8042.address.physical", NULL,232 (uintptr_t) I8042_BASE);233 sysinfo_set_item_val("i8042.address.kernel", NULL,234 (uintptr_t) I8042_BASE);235 216 #endif 236 217 237 218 if (irqs_info != NULL) 238 219 sysinfo_set_item_val(irqs_info, NULL, true); 239 240 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);241 220 } 242 221 … … 261 240 * we need not to go to CPL0 to read it. 262 241 */ 263 sysarg_t sys_tls_set( sysarg_t addr)242 sysarg_t sys_tls_set(uintptr_t addr) 264 243 { 265 244 THREAD->arch.tls = addr; 266 245 write_msr(AMD_MSR_FS, addr); 267 246 268 return 0;247 return EOK; 269 248 } 270 249 -
kernel/arch/amd64/src/boot/memmap.c
rbd5f3b7 r00aece0 35 35 #include <arch/boot/memmap.h> 36 36 37 uint8_t e820counter = 0 xffU;37 uint8_t e820counter = 0; 38 38 e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS]; 39 39 -
kernel/arch/amd64/src/boot/multiboot.S
rbd5f3b7 r00aece0 30 30 31 31 #include <arch/boot/boot.h> 32 #include <arch/boot/memmap.h>33 32 #include <arch/mm/page.h> 34 33 #include <arch/mm/ptl.h> 35 34 #include <arch/pm.h> 35 #include <genarch/multiboot/multiboot.h> 36 #include <arch/cpuid.h> 36 37 #include <arch/cpu.h> 37 #include <arch/cpuid.h>38 38 39 39 #define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE) … … 101 101 multiboot_meeting_point: 102 102 103 /* Save GRUB arguments */ 104 movl %eax, grub_eax 105 movl %ebx, grub_ebx 103 /* 104 * Protected 32-bit. We want to reuse the code-seg descriptor, 105 * the Default operand size must not be 1 when entering long mode. 106 */ 107 108 /* Save multiboot arguments */ 109 movl %eax, multiboot_eax 110 movl %ebx, multiboot_ebx 106 111 107 112 pm_status $status_prot … … 149 154 150 155 #include "vesa_prot.inc" 151 152 /*153 * Protected 32-bit. We want to reuse the code-seg descriptor,154 * the Default operand size must not be 1 when entering long mode.155 */156 156 157 157 pm2_status $status_prot2 … … 422 422 long_status $status_long 423 423 424 /* Call arch_pre_main( grub_eax, grub_ebx) */424 /* Call arch_pre_main(multiboot_eax, multiboot_ebx) */ 425 425 xorq %rdi, %rdi 426 movl grub_eax, %edi426 movl multiboot_eax, %edi 427 427 xorq %rsi, %rsi 428 movl grub_ebx, %esi428 movl multiboot_ebx, %esi 429 429 430 430 movabsq $arch_pre_main, %rax … … 645 645 .section K_DATA_START, "aw", @progbits 646 646 647 .global bootstrap_gdtr 647 648 bootstrap_gdtr: 648 649 .word GDT_SELECTOR(GDT_ITEMS) 649 650 .long KA2PA(gdt) 650 651 651 grub_eax: 652 .global multiboot_eax 653 multiboot_eax: 652 654 .long 0 653 655 654 grub_ebx: 656 .global multiboot_ebx 657 multiboot_ebx: 655 658 .long 0 656 659 … … 670 673 status_vesa_copy: 671 674 .asciz "[vesa_copy] " 672 status_ grub_cmdline:673 .asciz "[ grub_cmdline] "675 status_multiboot_cmdline: 676 .asciz "[multiboot_cmdline] " 674 677 status_vesa_real: 675 678 .asciz "[vesa_real] " -
kernel/arch/amd64/src/mm/page.c
rbd5f3b7 r00aece0 46 46 #include <panic.h> 47 47 #include <align.h> 48 #include <macros.h> 48 49 49 50 void page_arch_init(void) 50 51 { 51 if (config.cpu_active == 1) { 52 uintptr_t cur; 53 unsigned int identity_flags = 54 PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE; 52 if (config.cpu_active > 1) { 53 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 54 return; 55 } 56 57 uintptr_t cur; 58 unsigned int identity_flags = 59 PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE; 55 60 56 page_mapping_operations = &pt_mapping_operations;61 page_mapping_operations = &pt_mapping_operations; 57 62 58 page_table_lock(AS_KERNEL, true);63 page_table_lock(AS_KERNEL, true); 59 64 60 /* 61 * PA2KA(identity) mapping for all frames. 62 */ 63 for (cur = 0; cur < last_frame; cur += FRAME_SIZE) 64 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags); 65 /* 66 * PA2KA(identity) mapping for all low-memory frames. 67 */ 68 for (cur = 0; cur < min(config.identity_size, config.physmem_end); 69 cur += FRAME_SIZE) 70 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags); 65 71 66 page_table_unlock(AS_KERNEL, true);72 page_table_unlock(AS_KERNEL, true); 67 73 68 exc_register(14, "page_fault", true, (iroutine_t) page_fault); 69 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 70 } else 71 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 74 exc_register(14, "page_fault", true, (iroutine_t) page_fault); 75 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 72 76 } 73 77 … … 94 98 } 95 99 96 uintptr_t hw_map(uintptr_t physaddr, size_t size)97 {98 if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))99 panic("Unable to map physical memory %p (%zu bytes).",100 (void *) physaddr, size);101 102 uintptr_t virtaddr = PA2KA(last_frame);103 pfn_t i;104 105 page_table_lock(AS_KERNEL, true);106 107 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)108 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);109 110 page_table_unlock(AS_KERNEL, true);111 112 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);113 114 return virtaddr;115 }116 117 100 /** @} 118 101 */ -
kernel/arch/arm32/Makefile.inc
rbd5f3b7 r00aece0 53 53 arch/$(KARCH)/src/debug/stacktrace.c \ 54 54 arch/$(KARCH)/src/debug/stacktrace_asm.S \ 55 arch/$(KARCH)/src/mm/km.c \ 55 56 arch/$(KARCH)/src/mm/as.c \ 56 57 arch/$(KARCH)/src/mm/frame.c \ -
kernel/arch/arm32/include/mach/integratorcp/integratorcp.h
rbd5f3b7 r00aece0 103 103 extern void icp_cpu_halt(void); 104 104 extern void icp_irq_exception(unsigned int, istate_t *); 105 extern void icp_get_memory_extents(uintptr_t *, uintptr_t *);105 extern void icp_get_memory_extents(uintptr_t *, size_t *); 106 106 extern void icp_frame_init(void); 107 107 extern size_t icp_get_irq_count(void); -
kernel/arch/arm32/include/mach/testarm/testarm.h
rbd5f3b7 r00aece0 71 71 extern void gxemul_cpu_halt(void); 72 72 extern void gxemul_irq_exception(unsigned int, istate_t *); 73 extern void gxemul_get_memory_extents(uintptr_t *, uintptr_t *);73 extern void gxemul_get_memory_extents(uintptr_t *, size_t *); 74 74 extern void gxemul_frame_init(void); 75 75 extern size_t gxemul_get_irq_count(void); -
kernel/arch/arm32/include/machine_func.h
rbd5f3b7 r00aece0 50 50 void (*machine_timer_irq_start)(void); 51 51 void (*machine_cpu_halt)(void); 52 void (*machine_get_memory_extents)(uintptr_t *, uintptr_t *);52 void (*machine_get_memory_extents)(uintptr_t *, size_t *); 53 53 void (*machine_irq_exception)(unsigned int, istate_t *); 54 54 void (*machine_frame_init)(void); … … 81 81 * @param size Place to store memory size. 82 82 */ 83 extern void machine_get_memory_extents(uintptr_t *start, uintptr_t *size);83 extern void machine_get_memory_extents(uintptr_t *start, size_t *size); 84 84 85 85 /** Interrupt exception handler. -
kernel/arch/arm32/include/mm/frame.h
rbd5f3b7 r00aece0 61 61 #endif 62 62 63 extern uintptr_t last_frame; 64 65 extern void frame_arch_init(void); 63 extern void frame_low_arch_init(void); 64 extern void frame_high_arch_init(void); 66 65 extern void boot_page_table_free(void); 67 66 #define physmem_print() -
kernel/arch/arm32/include/mm/page.h
rbd5f3b7 r00aece0 54 54 55 55 /* Number of entries in each level. */ 56 #define PTL0_ENTRIES_ARCH ( 2<< 12) /* 4096 */56 #define PTL0_ENTRIES_ARCH (1 << 12) /* 4096 */ 57 57 #define PTL1_ENTRIES_ARCH 0 58 58 #define PTL2_ENTRIES_ARCH 0 59 59 /* coarse page tables used (256 * 4 = 1KB per page) */ 60 #define PTL3_ENTRIES_ARCH ( 2<< 8) /* 256 */60 #define PTL3_ENTRIES_ARCH (1 << 8) /* 256 */ 61 61 62 62 /* Page table sizes for each level. */ -
kernel/arch/arm32/src/arm32.c
rbd5f3b7 r00aece0 38 38 #include <genarch/fb/fb.h> 39 39 #include <abi/fb/visuals.h> 40 #include <sysinfo/sysinfo.h>41 40 #include <console/console.h> 42 41 #include <ddi/irq.h> … … 58 57 size_t i; 59 58 for (i = 0; i < init.cnt; i++) { 60 init.tasks[i]. addr = (uintptr_t) bootinfo->tasks[i].addr;59 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr); 61 60 init.tasks[i].size = bootinfo->tasks[i].size; 62 61 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, -
kernel/arch/arm32/src/mach/gta02/gta02.c
rbd5f3b7 r00aece0 38 38 #include <arch/mm/page.h> 39 39 #include <mm/page.h> 40 #include <mm/km.h> 40 41 #include <genarch/fb/fb.h> 41 42 #include <abi/fb/visuals.h> … … 65 66 static void gta02_timer_irq_start(void); 66 67 static void gta02_cpu_halt(void); 67 static void gta02_get_memory_extents(uintptr_t *start, uintptr_t *size);68 static void gta02_get_memory_extents(uintptr_t *start, size_t *size); 68 69 static void gta02_irq_exception(unsigned int exc_no, istate_t *istate); 69 70 static void gta02_frame_init(void); … … 101 102 s3c24xx_irqc_regs_t *irqc_regs; 102 103 103 gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE); 104 irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE); 104 gta02_timer = (void *) km_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE, 105 PAGE_NOT_CACHEABLE); 106 irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE, 107 PAGE_NOT_CACHEABLE); 105 108 106 109 /* Initialize interrupt controller. */ … … 123 126 * @param size Place to store memory size. 124 127 */ 125 static void gta02_get_memory_extents(uintptr_t *start, uintptr_t *size)128 static void gta02_get_memory_extents(uintptr_t *start, size_t *size) 126 129 { 127 130 *start = GTA02_MEMORY_START + GTA02_MEMORY_SKIP; -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
rbd5f3b7 r00aece0 45 45 #include <mm/page.h> 46 46 #include <mm/frame.h> 47 #include <mm/km.h> 47 48 #include <arch/mm/frame.h> 48 49 #include <arch/mach/integratorcp/integratorcp.h> … … 128 129 void icp_init(void) 129 130 { 130 icp_hw_map.uart = hw_map(ICP_UART, PAGE_SIZE); 131 icp_hw_map.kbd_ctrl = hw_map(ICP_KBD, PAGE_SIZE); 131 icp_hw_map.uart = km_map(ICP_UART, PAGE_SIZE, 132 PAGE_WRITE | PAGE_NOT_CACHEABLE); 133 icp_hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE); 132 134 icp_hw_map.kbd_stat = icp_hw_map.kbd_ctrl + ICP_KBD_STAT; 133 135 icp_hw_map.kbd_data = icp_hw_map.kbd_ctrl + ICP_KBD_DATA; 134 136 icp_hw_map.kbd_intstat = icp_hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; 135 icp_hw_map.rtc = hw_map(ICP_RTC, PAGE_SIZE); 137 icp_hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, 138 PAGE_WRITE | PAGE_NOT_CACHEABLE); 136 139 icp_hw_map.rtc1_load = icp_hw_map.rtc + ICP_RTC1_LOAD_OFFSET; 137 140 icp_hw_map.rtc1_read = icp_hw_map.rtc + ICP_RTC1_READ_OFFSET; … … 141 144 icp_hw_map.rtc1_intrstat = icp_hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET; 142 145 143 icp_hw_map.irqc = hw_map(ICP_IRQC, PAGE_SIZE); 146 icp_hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, 147 PAGE_WRITE | PAGE_NOT_CACHEABLE); 144 148 icp_hw_map.irqc_mask = icp_hw_map.irqc + ICP_IRQC_MASK_OFFSET; 145 149 icp_hw_map.irqc_unmask = icp_hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; 146 icp_hw_map.cmcr = hw_map(ICP_CMCR, PAGE_SIZE); 150 icp_hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, 151 PAGE_WRITE | PAGE_NOT_CACHEABLE); 147 152 icp_hw_map.sdramcr = icp_hw_map.cmcr + ICP_SDRAMCR_OFFSET; 148 icp_hw_map.vga = hw_map(ICP_VGA, PAGE_SIZE); 153 icp_hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, 154 PAGE_WRITE | PAGE_NOT_CACHEABLE); 149 155 150 156 hw_map_init_called = true; … … 220 226 * @param size Place to store memory size. 221 227 */ 222 void icp_get_memory_extents(uintptr_t *start, uintptr_t *size)228 void icp_get_memory_extents(uintptr_t *start, size_t *size) 223 229 { 224 230 *start = 0; … … 326 332 sysinfo_set_item_val("kbd", NULL, true); 327 333 sysinfo_set_item_val("kbd.inr", NULL, ICP_KBD_IRQ); 328 sysinfo_set_item_val("kbd.address.status", NULL, 329 (uintptr_t) icp_hw_map.kbd_stat); 330 sysinfo_set_item_val("kbd.address.data", NULL, 331 (uintptr_t) icp_hw_map.kbd_data); 334 sysinfo_set_item_val("kbd.address.physical", NULL, 335 ICP_KBD); 332 336 333 337 } -
kernel/arch/arm32/src/mach/testarm/testarm.c
rbd5f3b7 r00aece0 37 37 #include <arch/mach/testarm/testarm.h> 38 38 #include <mm/page.h> 39 #include <mm/km.h> 39 40 #include <genarch/fb/fb.h> 40 41 #include <abi/fb/visuals.h> … … 71 72 void gxemul_init(void) 72 73 { 73 gxemul_kbd = (void *) hw_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE); 74 gxemul_rtc = (void *) hw_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE); 75 gxemul_irqc = (void *) hw_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE); 74 gxemul_kbd = (void *) km_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE, 75 PAGE_WRITE | PAGE_NOT_CACHEABLE); 76 gxemul_rtc = (void *) km_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE, 77 PAGE_WRITE | PAGE_NOT_CACHEABLE); 78 gxemul_irqc = (void *) km_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE, 79 PAGE_WRITE | PAGE_NOT_CACHEABLE); 76 80 } 77 81 … … 124 128 sysinfo_set_item_val("kbd", NULL, true); 125 129 sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); 126 sysinfo_set_item_val("kbd.address.virtual", NULL, (sysarg_t) gxemul_kbd); 130 sysinfo_set_item_val("kbd.address.physical", NULL, 131 GXEMUL_KBD_ADDRESS); 127 132 #endif 128 133 } … … 202 207 * @param size Place to store memory size. 203 208 */ 204 void gxemul_get_memory_extents(uintptr_t *start, uintptr_t *size)209 void gxemul_get_memory_extents(uintptr_t *start, size_t *size) 205 210 { 206 211 *start = 0; 207 *size = *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET));212 *size = *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET)); 208 213 } 209 214 -
kernel/arch/arm32/src/machine_func.c
rbd5f3b7 r00aece0 85 85 * @param size Place to store memory size. 86 86 */ 87 void machine_get_memory_extents(uintptr_t *start, uintptr_t *size)87 void machine_get_memory_extents(uintptr_t *start, size_t *size) 88 88 { 89 89 (machine_ops->machine_get_memory_extents)(start, size); -
kernel/arch/arm32/src/mm/frame.c
rbd5f3b7 r00aece0 39 39 #include <config.h> 40 40 #include <align.h> 41 #include <macros.h> 41 42 42 /** Address of the last frame in the memory. */ 43 uintptr_t last_frame = 0; 43 static void frame_common_arch_init(bool low) 44 { 45 uintptr_t base; 46 size_t size; 44 47 45 /** Creates memory zones. */ 46 void frame_arch_init(void) 48 machine_get_memory_extents(&base, &size); 49 base = ALIGN_UP(base, FRAME_SIZE); 50 size = ALIGN_DOWN(size, FRAME_SIZE); 51 52 if (!frame_adjust_zone_bounds(low, &base, &size)) 53 return; 54 55 if (low) { 56 zone_create(ADDR2PFN(base), SIZE2FRAMES(size), 57 BOOT_PAGE_TABLE_START_FRAME + 58 BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 59 ZONE_AVAILABLE | ZONE_LOWMEM); 60 } else { 61 pfn_t conf = zone_external_conf_alloc(SIZE2FRAMES(size)); 62 if (conf != 0) 63 zone_create(ADDR2PFN(base), SIZE2FRAMES(size), conf, 64 ZONE_AVAILABLE | ZONE_HIGHMEM); 65 } 66 67 } 68 69 /** Create low memory zones. */ 70 void frame_low_arch_init(void) 47 71 { 48 uintptr_t mem_start, mem_size; 49 uintptr_t first_frame; 50 uintptr_t num_frames; 72 frame_common_arch_init(true); 51 73 52 machine_get_memory_extents(&mem_start, &mem_size);53 first_frame = ALIGN_UP(mem_start, FRAME_SIZE);54 last_frame = ALIGN_DOWN(mem_start + mem_size, FRAME_SIZE);55 num_frames = (last_frame - first_frame) >> FRAME_WIDTH;56 57 /* All memory as one zone */58 zone_create(first_frame >> FRAME_WIDTH, num_frames,59 BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);60 61 74 /* blacklist boot page table */ 62 75 frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME, … … 64 77 65 78 machine_frame_init(); 79 } 80 81 /** Create high memory zones. */ 82 void frame_high_arch_init(void) 83 { 84 frame_common_arch_init(false); 66 85 } 67 86 -
kernel/arch/arm32/src/mm/page.c
rbd5f3b7 r00aece0 37 37 #include <genarch/mm/page_pt.h> 38 38 #include <mm/page.h> 39 #include <arch/mm/frame.h> 39 40 #include <align.h> 40 41 #include <config.h> … … 42 43 #include <typedefs.h> 43 44 #include <interrupt.h> 44 #include < arch/mm/frame.h>45 #include <macros.h> 45 46 46 47 /** Initializes page tables. … … 57 58 58 59 uintptr_t cur; 60 59 61 /* Kernel identity mapping */ 60 for (cur = PHYSMEM_START_ADDR; cur < last_frame; cur += FRAME_SIZE) 62 for (cur = PHYSMEM_START_ADDR; 63 cur < min(config.identity_size, config.physmem_end); 64 cur += FRAME_SIZE) 61 65 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 62 66 67 #ifdef HIGH_EXCEPTION_VECTORS 63 68 /* Create mapping for exception table at high offset */ 64 #ifdef HIGH_EXCEPTION_VECTORS 65 void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA); 66 page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags); 69 uintptr_t ev_frame = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_NONE); 70 page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, ev_frame, flags); 67 71 #else 68 72 #error "Only high exception vector supported now" 69 73 #endif 70 cur = ALIGN_DOWN(0x50008010, FRAME_SIZE);71 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);72 74 73 75 page_table_unlock(AS_KERNEL, true); … … 78 80 } 79 81 80 /** Maps device into the kernel space.81 *82 * Maps physical address of device into kernel virtual address space (so it can83 * be accessed only by kernel through virtual address).84 *85 * @param physaddr Physical address where device is connected.86 * @param size Length of area where device is present.87 *88 * @return Virtual address where device will be accessible.89 */90 uintptr_t hw_map(uintptr_t physaddr, size_t size)91 {92 if (last_frame + ALIGN_UP(size, PAGE_SIZE) >93 KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {94 panic("Unable to map physical memory %p (%d bytes).",95 (void *) physaddr, size);96 }97 98 uintptr_t virtaddr = PA2KA(last_frame);99 pfn_t i;100 101 page_table_lock(AS_KERNEL, true);102 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {103 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i),104 physaddr + PFN2ADDR(i),105 PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL);106 }107 page_table_unlock(AS_KERNEL, true);108 109 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);110 return virtaddr;111 }112 113 82 /** @} 114 83 */ -
kernel/arch/arm32/src/ras.c
rbd5f3b7 r00aece0 38 38 #include <mm/frame.h> 39 39 #include <mm/page.h> 40 #include <mm/km.h> 40 41 #include <mm/tlb.h> 41 42 #include <mm/asid.h> … … 50 51 void ras_init(void) 51 52 { 52 ras_page = frame_alloc(ONE_FRAME, FRAME_KA); 53 memsetb(ras_page, FRAME_SIZE, 0); 53 uintptr_t frame; 54 55 frame = (uintptr_t) frame_alloc(ONE_FRAME, 56 FRAME_ATOMIC | FRAME_HIGHMEM); 57 if (!frame) 58 frame = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_LOWMEM); 59 ras_page = (uintptr_t *) km_map(frame, 60 PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE); 61 62 memsetb(ras_page, PAGE_SIZE, 0); 54 63 ras_page[RAS_START] = 0; 55 64 ras_page[RAS_END] = 0xffffffff; 56 /*57 * Userspace needs to be able to write to this page. The page is58 * cached in TLB as PAGE_KERNEL. Purge it from TLB and map it59 * read/write PAGE_USER.60 */61 tlb_invalidate_pages(ASID_KERNEL, (uintptr_t)ras_page, 1);62 page_table_lock(AS, true);63 page_mapping_insert(AS, (uintptr_t)ras_page, (uintptr_t)KA2PA(ras_page),64 PAGE_READ | PAGE_WRITE | PAGE_USER);65 page_table_unlock(AS, true);66 65 } 67 66 … … 86 85 } 87 86 87 /** @} 88 */ -
kernel/arch/ia32/Makefile.inc
rbd5f3b7 r00aece0 99 99 arch/$(KARCH)/src/userspace.c \ 100 100 arch/$(KARCH)/src/cpu/cpu.c \ 101 arch/$(KARCH)/src/mm/km.c \ 101 102 arch/$(KARCH)/src/mm/as.c \ 102 103 arch/$(KARCH)/src/mm/frame.c \ … … 106 107 arch/$(KARCH)/src/drivers/i8254.c \ 107 108 arch/$(KARCH)/src/drivers/i8259.c \ 108 arch/$(KARCH)/src/ drivers/vesa.c\109 arch/$(KARCH)/src/boot/ boot.S \109 arch/$(KARCH)/src/boot/multiboot.S \ 110 arch/$(KARCH)/src/boot/multiboot2.S \ 110 111 arch/$(KARCH)/src/boot/memmap.c \ 111 112 arch/$(KARCH)/src/fpu_context.c \ -
kernel/arch/ia32/include/arch.h
rbd5f3b7 r00aece0 36 36 #define KERN_ia32_ARCH_H_ 37 37 38 #include < genarch/multiboot/multiboot.h>38 #include <typedefs.h> 39 39 40 extern void arch_pre_main(uint32_t, const multiboot_info_t*);40 extern void arch_pre_main(uint32_t, void *); 41 41 42 42 #endif -
kernel/arch/ia32/include/boot/boot.h
rbd5f3b7 r00aece0 40 40 #define BOOT_STACK_SIZE 0x0400 41 41 42 #define MULTIBOOT_HEADER_MAGIC 0x1BADB00243 #define MULTIBOOT_HEADER_FLAGS 0x0001000344 45 #define MULTIBOOT_LOADER_MAGIC 0x2BADB00246 47 42 #ifndef __ASM__ 48 43 -
kernel/arch/ia32/include/interrupt.h
rbd5f3b7 r00aece0 55 55 #define IRQ_PIC_SPUR 7 56 56 #define IRQ_MOUSE 12 57 #define IRQ_NE2000 558 57 59 58 /* This one must have four least significant bits set to ones */ -
kernel/arch/ia32/include/mm/frame.h
rbd5f3b7 r00aece0 43 43 #include <typedefs.h> 44 44 45 extern uintptr_t last_frame; 46 47 extern void frame_arch_init(void); 45 extern void frame_low_arch_init(void); 46 extern void frame_high_arch_init(void); 48 47 extern void physmem_print(void); 49 48 -
kernel/arch/ia32/src/boot/memmap.c
rbd5f3b7 r00aece0 35 35 #include <arch/boot/memmap.h> 36 36 37 uint8_t e820counter = 0 xffU;37 uint8_t e820counter = 0; 38 38 e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS]; 39 39 -
kernel/arch/ia32/src/boot/multiboot.S
rbd5f3b7 r00aece0 2 2 * Copyright (c) 2001 Jakub Jermar 3 3 * Copyright (c) 2005 Martin Decky 4 * Copyright (c) 2011 Martin Sucha 4 5 * All rights reserved. 5 6 * … … 29 30 30 31 #include <arch/boot/boot.h> 31 #include <arch/boot/memmap.h>32 32 #include <arch/mm/page.h> 33 33 #include <arch/pm.h> 34 #include <genarch/multiboot/multiboot.h> 34 35 #include <arch/cpuid.h> 35 36 … … 91 92 multiboot_meeting_point: 92 93 93 /* Save GRUBarguments */94 movl %eax, grub_eax95 movl %ebx, grub_ebx94 /* Save multiboot arguments */ 95 movl %eax, multiboot_eax 96 movl %ebx, multiboot_ebx 96 97 97 98 pm_status $status_prot … … 124 125 /* Map kernel and turn paging on */ 125 126 pm_status $status_non_pse 126 call map_kernel 127 call map_kernel_non_pse 127 128 128 129 stack_init: … … 134 135 pm2_status $status_prot3 135 136 136 /* Call arch_pre_main( grub_eax, grub_ebx) */137 pushl grub_ebx138 pushl grub_eax137 /* Call arch_pre_main(multiboot_eax, multiboot_ebx) */ 138 pushl multiboot_ebx 139 pushl multiboot_eax 139 140 call arch_pre_main 140 141 … … 195 196 * 196 197 */ 197 .global map_kernel 198 map_kernel :198 .global map_kernel_non_pse 199 map_kernel_non_pse: 199 200 /* Paging features */ 200 201 movl %cr4, %ecx … … 299 300 find_mem_for_pt: 300 301 /* Check if multiboot info is present */ 301 cmpl $MULTIBOOT_LOADER_MAGIC, grub_eax302 cmpl $MULTIBOOT_LOADER_MAGIC, multiboot_eax 302 303 je check_multiboot_map 303 304 … … 307 308 308 309 /* Copy address of the multiboot info to ebx */ 309 movl grub_ebx, %ebx310 movl multiboot_ebx, %ebx 310 311 311 312 /* Check if memory map flag is present */ … … 701 702 .space 4096, 0 702 703 704 .global bootstrap_gdtr 703 705 bootstrap_gdtr: 704 706 .word GDT_SELECTOR(GDT_ITEMS) 705 707 .long KA2PA(gdt) 706 708 707 grub_eax: 709 .global multiboot_eax 710 multiboot_eax: 708 711 .long 0 709 grub_ebx: 712 713 .global multiboot_ebx 714 multiboot_ebx: 710 715 .long 0 711 716 … … 725 730 status_vesa_copy: 726 731 .asciz "[vesa_copy] " 727 status_ grub_cmdline:728 .asciz "[ grub_cmdline] "732 status_multiboot_cmdline: 733 .asciz "[multiboot_cmdline] " 729 734 status_vesa_real: 730 735 .asciz "[vesa_real] " -
kernel/arch/ia32/src/boot/vesa_prot.inc
rbd5f3b7 r00aece0 1 1 #ifdef CONFIG_FB 2 2 3 #define MULTIBOOT_LOADER_MAGIC 0x2BADB0024 3 #define MBINFO_BIT_CMDLINE 2 5 4 #define MBINFO_OFFSET_CMDLINE 16 … … 14 13 rep movsb 15 14 16 /* Check for GRUBcommand line */15 /* Check for multiboot command line */ 17 16 18 pm_status $status_ grub_cmdline17 pm_status $status_multiboot_cmdline 19 18 20 mov grub_eax, %eax19 mov multiboot_eax, %eax 21 20 cmp $MULTIBOOT_LOADER_MAGIC, %eax 22 21 jne no_cmdline 23 22 24 mov grub_ebx, %ebx23 mov multiboot_ebx, %ebx 25 24 mov (%ebx), %eax 26 25 bt $MBINFO_BIT_CMDLINE, %eax … … 89 88 /* Returned back to protected mode */ 90 89 91 mov %ax, KA2PA(vesa_scanline) 90 movzx %ax, %ecx 91 mov %ecx, KA2PA(bfb_scanline) 92 92 93 shr $16, %eax 93 mov %ax, KA2PA( vesa_bpp)94 mov %ax, KA2PA(bfb_bpp) 94 95 95 mov %bx, KA2PA(vesa_height) 96 movzx %bx, %ecx 97 mov %ecx, KA2PA(bfb_height) 98 96 99 shr $16, %ebx 97 mov % bx, KA2PA(vesa_width)100 mov %ebx, KA2PA(bfb_width) 98 101 99 mov %dl, KA2PA(vesa_green_pos) 102 mov %dl, KA2PA(bfb_green_pos) 103 100 104 shr $8, %edx 101 mov %dl, KA2PA(vesa_green_mask) 105 mov %dl, KA2PA(bfb_green_size) 106 102 107 shr $8, %edx 103 mov %dl, KA2PA(vesa_red_pos) 108 mov %dl, KA2PA(bfb_red_pos) 109 104 110 shr $8, %edx 105 mov %dl, KA2PA( vesa_red_mask)111 mov %dl, KA2PA(bfb_red_size) 106 112 107 113 mov %esi, %edx 108 mov %dl, KA2PA(vesa_blue_pos) 114 mov %dl, KA2PA(bfb_blue_pos) 115 109 116 shr $8, %edx 110 mov %dl, KA2PA( vesa_blue_mask)117 mov %dl, KA2PA(bfb_blue_size) 111 118 112 mov %edi, KA2PA( vesa_ph_addr)119 mov %edi, KA2PA(bfb_addr) 113 120 #endif -
kernel/arch/ia32/src/boot/vesa_real.inc
rbd5f3b7 r00aece0 304 304 /* 305 305 * Store mode parameters: 306 * eax = bpp[ 8] scanline[16]306 * eax = bpp[16] scanline[16] 307 307 * ebx = width[16] height[16] 308 308 * edx = red_mask[8] red_pos[8] green_mask[8] green_pos[8] … … 328 328 shl $8, %edx 329 329 mov VESA_MODE_RED_POS_OFFSET(%di), %dl 330 330 331 shl $8, %edx 331 332 mov VESA_MODE_GREEN_MASK_OFFSET(%di), %dl … … 369 370 mov $0x0003, %ax 370 371 int $0x10 371 mov $0xffffffff, %edi 372 xor %ax, %ax 372 373 xor %eax, %eax 374 xor %ebx, %ebx 375 xor %edx, %edx 376 xor %edi, %edi 377 373 378 jz vesa_leave_real /* force relative jump */ 374 379 … … 386 391 387 392 default_mode: 388 .ascii STRING(CONFIG_ VESA_MODE)393 .ascii STRING(CONFIG_BFB_MODE) 389 394 .ascii "-" 390 .asciz STRING(CONFIG_ VESA_BPP)395 .asciz STRING(CONFIG_BFB_BPP) 391 396 .fill 24 392 397 -
kernel/arch/ia32/src/ia32.c
rbd5f3b7 r00aece0 36 36 37 37 #include <arch.h> 38 39 38 #include <typedefs.h> 40 41 #include < arch/pm.h>42 43 #include < genarch/multiboot/multiboot.h>44 #include < genarch/drivers/legacy/ia32/io.h>45 #include < genarch/drivers/ega/ega.h>46 #include <arch/ drivers/vesa.h>47 #include < genarch/drivers/i8042/i8042.h>48 #include < genarch/kbrd/kbrd.h>39 #include <errno.h> 40 #include <memstr.h> 41 #include <interrupt.h> 42 #include <console/console.h> 43 #include <syscall/syscall.h> 44 #include <sysinfo/sysinfo.h> 45 #include <arch/bios/bios.h> 46 #include <arch/boot/boot.h> 47 #include <arch/debugger.h> 49 48 #include <arch/drivers/i8254.h> 50 49 #include <arch/drivers/i8259.h> 51 52 #include <arch/context.h>53 54 #include <config.h>55 56 #include <arch/interrupt.h>57 #include <arch/asm.h>58 50 #include <genarch/acpi/acpi.h> 59 60 #include <arch/bios/bios.h> 61 62 #include <interrupt.h> 63 #include <ddi/irq.h> 64 #include <arch/debugger.h> 65 #include <proc/thread.h> 66 #include <syscall/syscall.h> 67 #include <console/console.h> 68 #include <sysinfo/sysinfo.h> 69 #include <arch/boot/boot.h> 70 #include <memstr.h> 51 #include <genarch/drivers/ega/ega.h> 52 #include <genarch/drivers/i8042/i8042.h> 53 #include <genarch/drivers/legacy/ia32/io.h> 54 #include <genarch/fb/bfb.h> 55 #include <genarch/kbrd/kbrd.h> 56 #include <genarch/multiboot/multiboot.h> 57 #include <genarch/multiboot/multiboot2.h> 71 58 72 59 #ifdef CONFIG_SMP … … 76 63 /** Perform ia32-specific initialization before main_bsp() is called. 77 64 * 78 * @param signature Should contain the multiboot signature. 79 * @param mi Pointer to the multiboot information structure. 80 */ 81 void arch_pre_main(uint32_t signature, const multiboot_info_t *mi) 65 * @param signature Multiboot signature. 66 * @param info Multiboot information structure. 67 * 68 */ 69 void arch_pre_main(uint32_t signature, void *info) 82 70 { 83 71 /* Parse multiboot information obtained from the bootloader. */ 84 multiboot_info_parse(signature, mi); 72 multiboot_info_parse(signature, (multiboot_info_t *) info); 73 multiboot2_info_parse(signature, (multiboot2_info_t *) info); 85 74 86 75 #ifdef CONFIG_SMP … … 114 103 115 104 #if (defined(CONFIG_FB) || defined(CONFIG_EGA)) 116 bool vesa= false;105 bool bfb = false; 117 106 #endif 118 107 119 108 #ifdef CONFIG_FB 120 vesa = vesa_init();109 bfb = bfb_init(); 121 110 #endif 122 111 123 112 #ifdef CONFIG_EGA 124 if (! vesa) {113 if (!bfb) { 125 114 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM); 126 115 if (egadev) … … 179 168 } 180 169 } 181 182 /*183 * This is the necessary evil until the userspace driver is entirely184 * self-sufficient.185 */186 sysinfo_set_item_val("i8042", NULL, true);187 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);188 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);189 sysinfo_set_item_val("i8042.address.physical", NULL,190 (uintptr_t) I8042_BASE);191 sysinfo_set_item_val("i8042.address.kernel", NULL,192 (uintptr_t) I8042_BASE);193 170 #endif 194 171 195 172 if (irqs_info != NULL) 196 173 sysinfo_set_item_val(irqs_info, NULL, true); 197 198 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);199 174 } 200 175 … … 216 191 * selector, and the descriptor->base is the correct address. 217 192 */ 218 sysarg_t sys_tls_set( sysarg_t addr)193 sysarg_t sys_tls_set(uintptr_t addr) 219 194 { 220 195 THREAD->arch.tls = addr; 221 196 set_tls_desc(addr); 222 197 223 return 0;198 return EOK; 224 199 } 225 200 -
kernel/arch/ia32/src/mm/frame.c
rbd5f3b7 r00aece0 46 46 #include <print.h> 47 47 48 #define PHYSMEM_LIMIT32 UINT64_C(0x07c000000) 49 #define PHYSMEM_LIMIT64 UINT64_C(0x200000000) 48 #define PHYSMEM_LIMIT32 UINT64_C(0x100000000) 50 49 51 50 size_t hardcoded_unmapped_ktext_size = 0; 52 51 size_t hardcoded_unmapped_kdata_size = 0; 53 52 54 uintptr_t last_frame = 0; 55 56 static void init_e820_memory(pfn_t minconf) 53 static void init_e820_memory(pfn_t minconf, bool low) 57 54 { 58 55 unsigned int i; 59 56 60 57 for (i = 0; i < e820counter; i++) { 61 uint64_t base = e820table[i].base_address;62 uint64_t size = e820table[i].size;58 uint64_t base64 = e820table[i].base_address; 59 uint64_t size64 = e820table[i].size; 63 60 64 #ifdef __32_BITS__61 #ifdef KARCH_ia32 65 62 /* 66 * XXX FIXME: 67 * 68 * Ignore zones which start above PHYSMEM_LIMIT32 69 * or clip zones which go beyond PHYSMEM_LIMIT32. 70 * 71 * The PHYSMEM_LIMIT32 (2 GB - 64 MB) is a rather 72 * arbitrary constant which allows to have at 73 * least 64 MB in the kernel address space to 74 * map hardware resources. 75 * 76 * The kernel uses fixed 1:1 identity mapping 77 * of the physical memory with 2:2 GB split. 78 * This is a severe limitation of the current 79 * kernel memory management. 80 * 63 * Restrict the e820 table entries to 32-bits. 81 64 */ 82 83 if (base > PHYSMEM_LIMIT32) 65 if (base64 >= PHYSMEM_LIMIT32) 84 66 continue; 85 67 86 if (base + size> PHYSMEM_LIMIT32)87 size = PHYSMEM_LIMIT32 - base;68 if (base64 + size64 > PHYSMEM_LIMIT32) 69 size64 = PHYSMEM_LIMIT32 - base64; 88 70 #endif 89 71 90 #ifdef __64_BITS__ 91 /* 92 * XXX FIXME: 93 * 94 * Ignore zones which start above PHYSMEM_LIMIT64 95 * or clip zones which go beyond PHYSMEM_LIMIT64. 96 * 97 * The PHYSMEM_LIMIT64 (8 GB) is the size of the 98 * fixed 1:1 identically mapped physical memory 99 * accessible during the bootstrap process. 100 * This is a severe limitation of the current 101 * kernel memory management. 102 * 103 */ 72 uintptr_t base = (uintptr_t) base64; 73 size_t size = (size_t) size64; 104 74 105 if ( base > PHYSMEM_LIMIT64)75 if (!frame_adjust_zone_bounds(low, &base, &size)) 106 76 continue; 107 108 if (base + size > PHYSMEM_LIMIT64)109 size = PHYSMEM_LIMIT64 - base;110 #endif111 77 112 78 if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) { … … 116 82 FRAME_SIZE); 117 83 84 size_t count = SIZE2FRAMES(new_size); 118 85 pfn_t pfn = ADDR2PFN(new_base); 119 size_t count = SIZE2FRAMES(new_size);86 pfn_t conf; 120 87 121 pfn_t conf; 122 if ((minconf < pfn) || (minconf >= pfn + count)) 123 conf = pfn; 124 else 125 conf = minconf; 126 127 zone_create(pfn, count, conf, ZONE_AVAILABLE); 128 129 // XXX this has to be removed 130 if (last_frame < ALIGN_UP(new_base + new_size, FRAME_SIZE)) 131 last_frame = ALIGN_UP(new_base + new_size, FRAME_SIZE); 88 if (low) { 89 if ((minconf < pfn) || (minconf >= pfn + count)) 90 conf = pfn; 91 else 92 conf = minconf; 93 zone_create(pfn, count, conf, 94 ZONE_AVAILABLE | ZONE_LOWMEM); 95 } else { 96 conf = zone_external_conf_alloc(count); 97 if (conf != 0) 98 zone_create(pfn, count, conf, 99 ZONE_AVAILABLE | ZONE_HIGHMEM); 100 } 132 101 } else if ((e820table[i].type == MEMMAP_MEMORY_ACPI) || 133 102 (e820table[i].type == MEMMAP_MEMORY_NVS)) { … … 179 148 180 149 181 void frame_ arch_init(void)150 void frame_low_arch_init(void) 182 151 { 183 152 pfn_t minconf; … … 192 161 #endif 193 162 194 init_e820_memory(minconf );163 init_e820_memory(minconf, true); 195 164 196 165 /* Reserve frame 0 (BIOS data) */ … … 206 175 } 207 176 177 void frame_high_arch_init(void) 178 { 179 if (config.cpu_active == 1) 180 init_e820_memory(0, false); 181 } 182 208 183 /** @} 209 184 */ -
kernel/arch/ia32/src/mm/page.c
rbd5f3b7 r00aece0 49 49 #include <print.h> 50 50 #include <interrupt.h> 51 #include <macros.h> 51 52 52 53 void page_arch_init(void) … … 55 56 int flags; 56 57 57 if (config.cpu_active == 1) { 58 page_mapping_operations = &pt_mapping_operations; 58 if (config.cpu_active > 1) { 59 /* Fast path for non-boot CPUs */ 60 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 61 paging_on(); 62 return; 63 } 64 65 page_mapping_operations = &pt_mapping_operations; 59 66 60 /* 61 * PA2KA(identity) mapping for all frames until last_frame. 62 */ 63 page_table_lock(AS_KERNEL, true); 64 for (cur = 0; cur < last_frame; cur += FRAME_SIZE) { 65 flags = PAGE_CACHEABLE | PAGE_WRITE; 66 if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size)) 67 flags |= PAGE_GLOBAL; 68 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 69 } 70 page_table_unlock(AS_KERNEL, true); 67 /* 68 * PA2KA(identity) mapping for all low-memory frames. 69 */ 70 page_table_lock(AS_KERNEL, true); 71 for (cur = 0; cur < min(config.identity_size, config.physmem_end); 72 cur += FRAME_SIZE) { 73 flags = PAGE_CACHEABLE | PAGE_WRITE; 74 if ((PA2KA(cur) >= config.base) && 75 (PA2KA(cur) < config.base + config.kernel_size)) 76 flags |= PAGE_GLOBAL; 77 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 78 } 79 page_table_unlock(AS_KERNEL, true); 71 80 72 exc_register(14, "page_fault", true, (iroutine_t) page_fault); 73 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 74 } else 75 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 81 exc_register(14, "page_fault", true, (iroutine_t) page_fault); 82 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 76 83 77 84 paging_on(); 78 }79 80 81 uintptr_t hw_map(uintptr_t physaddr, size_t size)82 {83 if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))84 panic("Unable to map physical memory %p (%zu bytes).",85 (void *) physaddr, size);86 87 uintptr_t virtaddr = PA2KA(last_frame);88 pfn_t i;89 page_table_lock(AS_KERNEL, true);90 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {91 uintptr_t addr = PFN2ADDR(i);92 page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr, PAGE_NOT_CACHEABLE | PAGE_WRITE);93 }94 page_table_unlock(AS_KERNEL, true);95 96 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);97 98 return virtaddr;99 85 } 100 86 -
kernel/arch/ia32/src/smp/ap.S
rbd5f3b7 r00aece0 28 28 # 29 29 30 # 31 #Init code for application processors.32 # 30 /* 31 * Init code for application processors. 32 */ 33 33 34 34 #include <arch/boot/boot.h> … … 46 46 KDATA=16 47 47 48 # This piece of code is real-mode and is meant to be aligned at 4K boundary. 49 # The requirement for such an alignment comes from MP Specification's STARTUP IPI 50 # requirements. 48 /* 49 * This piece of code is real-mode and is meant to be aligned at 4K boundary. 50 * The requirement for such an alignment comes from MP Specification's 51 * STARTUP IPI requirements. 52 */ 51 53 52 54 .align 4096 … … 57 59 movw %ax, %ds 58 60 59 lgdtl ap_gdtr # initialize Global Descriptor Table register 61 /* initialize Global Descriptor Table register */ 62 lgdtl ap_gdtr 60 63 64 /* switch to protected mode */ 61 65 movl %cr0, %eax 62 66 orl $1, %eax 63 movl %eax, %cr0 # switch to protected mode67 movl %eax, %cr0 64 68 jmpl $KTEXT, $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET 65 69 … … 70 74 movw %ax, %es 71 75 movw %ax, %ss 72 movl $KA2PA(ctx), %eax # KA2PA((uintptr_t) &ctx)76 movl $KA2PA(ctx), %eax /* KA2PA((uintptr_t) &ctx) */ 73 77 movl (%eax), %esp 74 subl $0x80000000, %esp # KA2PA(ctx.sp)78 subl $0x80000000, %esp /* KA2PA(ctx.sp) */ 75 79 76 call map_kernel # map kernel and turn paging on 80 /* 81 * Map kernel and turn paging on. 82 * We assume that when using SMP, PSE is always available 83 */ 84 call map_kernel_pse 77 85 78 addl $0x80000000, %esp # PA2KA(ctx.sp)86 addl $0x80000000, %esp /* PA2KA(ctx.sp) */ 79 87 80 pushl $0 # create the first stack frame 88 /* create the first stack frame */ 89 pushl $0 81 90 movl %esp, %ebp 82 91 -
kernel/arch/ia32/src/smp/smp.c
rbd5f3b7 r00aece0 47 47 #include <debug.h> 48 48 #include <arch/asm.h> 49 #include <mm/page.h> 49 50 #include <mm/frame.h> 50 #include <mm/ page.h>51 #include <mm/km.h> 51 52 #include <mm/slab.h> 52 53 #include <mm/as.h> … … 72 73 73 74 if (config.cpu_count > 1) { 74 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE); 75 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE); 75 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE, 76 PAGE_WRITE | PAGE_NOT_CACHEABLE); 77 io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE, 78 PAGE_WRITE | PAGE_NOT_CACHEABLE); 76 79 } 77 80 } -
kernel/arch/ia64/Makefile.inc
rbd5f3b7 r00aece0 52 52 arch/$(KARCH)/src/ivt.S \ 53 53 arch/$(KARCH)/src/interrupt.c \ 54 arch/$(KARCH)/src/mm/km.c \ 54 55 arch/$(KARCH)/src/mm/as.c \ 55 56 arch/$(KARCH)/src/mm/frame.c \ -
kernel/arch/ia64/include/arch.h
rbd5f3b7 r00aece0 36 36 #define KERN_ia64_ARCH_H_ 37 37 38 #include <arch/drivers/ski.h>39 40 38 extern void arch_pre_main(void); 41 39 -
kernel/arch/ia64/include/asm.h
rbd5f3b7 r00aece0 38 38 #include <config.h> 39 39 #include <typedefs.h> 40 #include <typedefs.h>41 40 #include <arch/register.h> 41 #include <arch/legacyio.h> 42 42 #include <trace.h> 43 43 44 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL45 46 44 #define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) 47 45 46 /** Map the I/O port address to a legacy I/O address. */ 47 NO_TRACE static inline uintptr_t p2a(volatile void *p) 48 { 49 uintptr_t prt = (uintptr_t) p; 50 51 return legacyio_virt_base + (((prt >> 2) << 12) | (prt & 0xfff)); 52 } 53 48 54 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) 49 55 { 50 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { 51 uintptr_t prt = (uintptr_t) port; 52 53 *((ioport8_t *) (IA64_IOSPACE_ADDRESS + 54 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v; 55 } else { 56 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) 57 *((ioport8_t *) p2a(port)) = v; 58 else 56 59 *port = v; 57 }58 60 59 61 asm volatile ( … … 65 67 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) 66 68 { 67 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { 68 uintptr_t prt = (uintptr_t) port; 69 70 *((ioport16_t *) (IA64_IOSPACE_ADDRESS + 71 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v; 72 } else { 69 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) 70 *((ioport16_t *) p2a(port)) = v; 71 else 73 72 *port = v; 74 }75 73 76 74 asm volatile ( … … 82 80 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) 83 81 { 84 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { 85 uintptr_t prt = (uintptr_t) port; 86 87 *((ioport32_t *) (IA64_IOSPACE_ADDRESS + 88 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v; 89 } else { 82 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) 83 *((ioport32_t *) p2a(port)) = v; 84 else 90 85 *port = v; 91 }92 86 93 87 asm volatile ( … … 106 100 ); 107 101 108 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { 109 uintptr_t prt = (uintptr_t) port; 110 111 v = *((ioport8_t *) (IA64_IOSPACE_ADDRESS + 112 ((prt & 0xfff) | ((prt >> 2) << 12)))); 113 } else { 102 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) 103 v = *((ioport8_t *) p2a(port)); 104 else 114 105 v = *port; 115 }116 106 117 107 return v; … … 127 117 ); 128 118 129 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { 130 uintptr_t prt = (uintptr_t) port; 131 132 v = *((ioport16_t *) (IA64_IOSPACE_ADDRESS + 133 ((prt & 0xfff) | ((prt >> 2) << 12)))); 134 } else { 119 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) 120 v = *((ioport16_t *) p2a(port)); 121 else 135 122 v = *port; 136 }137 123 138 124 return v; … … 148 134 ); 149 135 150 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { 151 uintptr_t prt = (uintptr_t) port; 152 153 v = *((ioport32_t *) (IA64_IOSPACE_ADDRESS + 154 ((prt & 0xfff) | ((prt >> 2) << 12)))); 155 } else { 136 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) 137 v = *((ioport32_t *) p2a(port)); 138 else 156 139 v = *port; 157 }158 140 159 141 return v; -
kernel/arch/ia64/include/interrupt.h
rbd5f3b7 r00aece0 61 61 #define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) 62 62 #define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) 63 #define IRQ_NE2000 (0x09 + LEGACY_INTERRUPT_BASE)64 63 65 64 /** General Exception codes. */ -
kernel/arch/ia64/include/mm/frame.h
rbd5f3b7 r00aece0 43 43 #include <typedefs.h> 44 44 45 extern uintptr_t last_frame;45 extern uintptr_t end_of_identity; 46 46 47 extern void frame_arch_init(void); 47 extern void frame_low_arch_init(void); 48 extern void frame_high_arch_init(void); 48 49 #define physmem_print() 49 50 -
kernel/arch/ia64/include/mm/page.h
rbd5f3b7 r00aece0 43 43 44 44 /** Bit width of the TLB-locked portion of kernel address space. */ 45 #define KERNEL_PAGE_WIDTH 28 /* 256M */ 46 #define IO_PAGE_WIDTH 26 /* 64M */ 47 #define FW_PAGE_WIDTH 28 /* 256M */ 48 49 #define USPACE_IO_PAGE_WIDTH 12 /* 4K */ 50 51 52 /* 53 * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses 54 * because of "minimal virtual bits implemented is 51" it is possible to 55 * have values up to 0x0007000000000000 56 */ 57 58 /* Firmware area (bellow 4GB in phys mem) */ 59 #define FW_OFFSET 0x00000000F0000000 60 /* Legacy IO space */ 61 #define IO_OFFSET 0x0001000000000000 62 /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */ 63 #define VIO_OFFSET 0x0002000000000000 64 45 #define KERNEL_PAGE_WIDTH 28 /* 256M */ 65 46 66 47 #define PPN_SHIFT 12 -
kernel/arch/ia64/src/drivers/ski.c
rbd5f3b7 r00aece0 219 219 * self-sufficient. 220 220 */ 221 sysinfo_set_item_val("fb", NULL, true); 221 222 sysinfo_set_item_val("fb.kind", NULL, 6); 222 223 -
kernel/arch/ia64/src/ia64.c
rbd5f3b7 r00aece0 34 34 35 35 #include <arch.h> 36 #include <arch/drivers/ski.h>37 #include <arch/drivers/it.h>38 #include <arch/interrupt.h>39 #include <arch/barrier.h>40 #include <arch/asm.h>41 #include <arch/register.h>42 36 #include <typedefs.h> 43 #include <arch/context.h> 44 #include <arch/stack.h> 45 #include <arch/mm/page.h> 37 #include <errno.h> 46 38 #include <interrupt.h> 47 #include <mm/as.h>48 #include <config.h>49 39 #include <macros.h> 40 #include <str.h> 50 41 #include <userspace.h> 51 42 #include <console/console.h> 52 #include <abi/proc/uarg.h>53 43 #include <syscall/syscall.h> 54 #include <ddi/irq.h> 55 #include <arch/bootinfo.h> 44 #include <sysinfo/sysinfo.h> 45 #include <arch/drivers/it.h> 46 #include <arch/drivers/kbd.h> 47 #include <arch/legacyio.h> 48 #include <genarch/drivers/ega/ega.h> 49 #include <genarch/drivers/i8042/i8042.h> 50 #include <genarch/drivers/ns16550/ns16550.h> 56 51 #include <genarch/drivers/legacy/ia32/io.h> 57 #include <genarch/drivers/ega/ega.h>58 52 #include <genarch/kbrd/kbrd.h> 59 53 #include <genarch/srln/srln.h> 60 #include <genarch/drivers/i8042/i8042.h> 61 #include <genarch/drivers/ns16550/ns16550.h> 62 #include <arch/drivers/kbd.h> 63 #include <smp/smp.h> 64 #include <smp/ipi.h> 65 #include <arch/atomic.h> 66 #include <panic.h> 67 #include <print.h> 68 #include <sysinfo/sysinfo.h> 69 #include <str.h> 54 #include <mm/page.h> 55 #include <mm/km.h> 56 57 #ifdef MACHINE_ski 58 #include <arch/drivers/ski.h> 59 #endif 70 60 71 61 /* NS16550 as a COM 1 */ … … 75 65 76 66 static uint64_t iosapic_base = 0xfec00000; 67 uintptr_t legacyio_virt_base = 0; 77 68 78 69 /** Performs ia64-specific initialization before main_bsp() is called. */ 79 70 void arch_pre_main(void) 80 71 { 81 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); 72 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, 73 CONFIG_INIT_TASKS); 82 74 size_t i; 75 83 76 for (i = 0; i < init.cnt; i++) { 84 init.tasks[i].addr = 85 ((unsigned long) bootinfo->taskmap.tasks[i].addr) | 86 VRN_MASK; 77 init.tasks[i].paddr = 78 (uintptr_t) bootinfo->taskmap.tasks[i].addr; 87 79 init.tasks[i].size = bootinfo->taskmap.tasks[i].size; 88 80 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, … … 93 85 void arch_pre_mm_init(void) 94 86 { 95 /*96 * Set Interruption Vector Address (i.e. location of interruption vector97 * table).98 */99 iva_write((uintptr_t) &ivt);100 srlz_d();101 102 87 } 103 88 104 89 static void iosapic_init(void) 105 90 { 106 uint64_t IOSAPIC = PA2KA((sysarg_t)(iosapic_base)) | FW_OFFSET; 91 uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE, 92 PAGE_WRITE | PAGE_NOT_CACHEABLE); 107 93 int i; 108 94 … … 131 117 { 132 118 if (config.cpu_active == 1) { 119 /* Map the page with legacy I/O. */ 120 legacyio_virt_base = km_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE, 121 PAGE_WRITE | PAGE_NOT_CACHEABLE); 122 133 123 iosapic_init(); 134 124 irq_init(INR_COUNT, INR_COUNT); … … 198 188 sysinfo_set_item_val("kbd.address.physical", NULL, 199 189 (uintptr_t) NS16550_BASE); 200 sysinfo_set_item_val("kbd.address.kernel", NULL,201 (uintptr_t) NS16550_BASE);202 190 #endif 203 191 204 192 #ifdef CONFIG_I8042 205 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD); 193 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, 194 IRQ_KBD); 206 195 if (i8042_instance) { 207 196 kbrd_instance_t *kbrd_instance = kbrd_init(); … … 212 201 } 213 202 } 214 215 sysinfo_set_item_val("i8042", NULL, true); 216 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD); 217 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE); 218 sysinfo_set_item_val("i8042.address.physical", NULL, 219 (uintptr_t) I8042_BASE); 220 sysinfo_set_item_val("i8042.address.kernel", NULL, 221 (uintptr_t) I8042_BASE); 222 #endif 223 224 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000); 225 203 #endif 204 226 205 sysinfo_set_item_val("ia64_iospace", NULL, true); 227 206 sysinfo_set_item_val("ia64_iospace.address", NULL, true); 228 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);207 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, LEGACYIO_USER_BASE); 229 208 } 230 209 … … 269 248 * We use r13 (a.k.a. tp) for this purpose. 270 249 */ 271 sysarg_t sys_tls_set( sysarg_t addr)272 { 273 return 0;250 sysarg_t sys_tls_set(uintptr_t addr) 251 { 252 return EOK; 274 253 } 275 254 … … 277 256 { 278 257 pio_write_8((ioport8_t *)0x64, 0xfe); 279 while (1) 280 ; 258 while (1); 281 259 } 282 260 -
kernel/arch/ia64/src/mm/frame.c
rbd5f3b7 r00aece0 51 51 #define MINCONF 1 52 52 53 uintptr_t last_frame = 0;53 uintptr_t end_of_identity = -1ULL; 54 54 55 void frame_arch_init(void)55 static void frame_common_arch_init(bool low) 56 56 { 57 if (config.cpu_active == 1) { 58 unsigned int i; 59 for (i = 0; i < bootinfo->memmap_items; i++) { 60 if (bootinfo->memmap[i].type == MEMMAP_FREE_MEM) { 61 uint64_t base = bootinfo->memmap[i].base; 62 uint64_t size = bootinfo->memmap[i].size; 63 uint64_t abase = ALIGN_UP(base, FRAME_SIZE); 57 unsigned int i; 64 58 65 if (size > FRAME_SIZE) 66 size -= abase - base; 59 for (i = 0; i < bootinfo->memmap_items; i++) { 60 if (bootinfo->memmap[i].type != MEMMAP_FREE_MEM) 61 continue; 67 62 68 if (size > MIN_ZONE_SIZE) { 69 zone_create(abase >> FRAME_WIDTH, 70 size >> FRAME_WIDTH, 71 max(MINCONF, abase >> FRAME_WIDTH), 72 0); 73 } 74 if (abase + size > last_frame) 75 last_frame = abase + size; 63 uintptr_t base = bootinfo->memmap[i].base; 64 size_t size = bootinfo->memmap[i].size; 65 uintptr_t abase = ALIGN_UP(base, FRAME_SIZE); 66 67 if (size > FRAME_SIZE) 68 size -= abase - base; 69 70 if (!frame_adjust_zone_bounds(low, &abase, &size)) 71 continue; 72 73 if (size > MIN_ZONE_SIZE) { 74 pfn_t pfn = ADDR2PFN(abase); 75 size_t count = SIZE2FRAMES(size); 76 77 if (low) { 78 zone_create(pfn, count, max(MINCONF, pfn), 79 ZONE_AVAILABLE | ZONE_LOWMEM); 80 } else { 81 pfn_t conf = zone_external_conf_alloc(count); 82 if (conf != 0) 83 zone_create(pfn, count, conf, 84 ZONE_AVAILABLE | ZONE_HIGHMEM); 76 85 } 77 86 } 78 79 /* 80 * Blacklist ROM regions. 81 */ 82 frame_mark_unavailable(ADDR2PFN(ROM_BASE), 83 SIZE2FRAMES(ROM_SIZE)); 87 } 88 } 84 89 85 frame_mark_unavailable(ADDR2PFN(KERNEL_RESERVED_AREA_BASE), 86 SIZE2FRAMES(KERNEL_RESERVED_AREA_SIZE)); 87 } 90 void frame_low_arch_init(void) 91 { 92 if (config.cpu_active > 1) 93 return; 94 95 frame_common_arch_init(true); 96 97 /* 98 * Blacklist ROM regions. 99 */ 100 frame_mark_unavailable(ADDR2PFN(ROM_BASE), 101 SIZE2FRAMES(ROM_SIZE)); 102 103 frame_mark_unavailable(ADDR2PFN(KERNEL_RESERVED_AREA_BASE), 104 SIZE2FRAMES(KERNEL_RESERVED_AREA_SIZE)); 105 106 /* PA2KA will work only on low-memory. */ 107 end_of_identity = PA2KA(config.physmem_end - FRAME_SIZE) + PAGE_SIZE; 108 } 109 110 void frame_high_arch_init(void) 111 { 112 if (config.cpu_active > 1) 113 return; 114 115 frame_common_arch_init(false); 88 116 } 89 117 -
kernel/arch/ia64/src/mm/page.c
rbd5f3b7 r00aece0 255 255 } 256 256 257 uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))258 {259 /* THIS is a dirty hack. */260 return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);261 }262 263 257 /** @} 264 258 */ -
kernel/arch/ia64/src/mm/tlb.c
rbd5f3b7 r00aece0 52 52 #include <arch.h> 53 53 #include <interrupt.h> 54 55 #define IO_FRAME_BASE 0xFFFFC000000 54 #include <arch/legacyio.h> 56 55 57 56 /** Invalidate all TLB entries. */ … … 467 466 } 468 467 468 static bool is_kernel_fault(uintptr_t va) 469 { 470 region_register_t rr; 471 472 rr.word = rr_read(VA2VRN(va)); 473 rid_t rid = rr.map.rid; 474 return (RID2ASID(rid) == ASID_KERNEL) && (VA2VRN(va) == VRN_KERNEL); 475 } 476 469 477 /** Instruction TLB fault handler for faults with VHPT turned off. 470 478 * … … 480 488 va = istate->cr_ifa; /* faulting address */ 481 489 482 page_table_lock(AS, true); 490 ASSERT(!is_kernel_fault(va)); 491 483 492 t = page_mapping_find(AS, va, true); 484 493 if (t) { … … 488 497 */ 489 498 itc_pte_copy(t); 490 page_table_unlock(AS, true);491 499 } else { 492 500 /* 493 501 * Forward the page fault to address space page fault handler. 494 502 */ 495 page_table_unlock(AS, true);496 503 if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { 497 504 fault_if_from_uspace(istate, "Page fault at %p.", … … 522 529 static int try_memmap_io_insertion(uintptr_t va, istate_t *istate) 523 530 { 524 if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 <<IO_PAGE_WIDTH))) {531 if ((va >= LEGACYIO_USER_BASE) && (va < LEGACYIO_USER_BASE + (1 << LEGACYIO_PAGE_WIDTH))) { 525 532 if (TASK) { 526 uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>527 USPACE_IO_PAGE_WIDTH;533 uint64_t io_page = (va & ((1 << LEGACYIO_PAGE_WIDTH) - 1)) >> 534 LEGACYIO_SINGLE_PAGE_WIDTH; 528 535 529 536 if (is_io_page_accessible(io_page)) { 530 537 uint64_t page, frame; 531 538 532 page = IO_OFFSET+533 (1 << USPACE_IO_PAGE_WIDTH) * io_page;534 frame = IO_FRAME_BASE +535 (1 << USPACE_IO_PAGE_WIDTH) * io_page;539 page = LEGACYIO_USER_BASE + 540 (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page; 541 frame = LEGACYIO_PHYS_BASE + 542 (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page; 536 543 537 544 tlb_entry_t entry; … … 547 554 entry.ar = AR_READ | AR_WRITE; 548 555 entry.ppn = frame >> PPN_SHIFT; 549 entry.ps = USPACE_IO_PAGE_WIDTH;556 entry.ps = LEGACYIO_SINGLE_PAGE_WIDTH; 550 557 551 558 dtc_mapping_insert(page, TASK->as->asid, entry); … … 570 577 { 571 578 if (istate->cr_isr.sp) { 572 /* Speculative load. Deffer the exception573 until a more clever approach can be used.574 575 Currently if we try to find the mapping576 for the speculative load while in the kernel,577 we might introduce a livelock because of578 the possibly invalid values of the address.*/579 /* 580 * Speculative load. Deffer the exception until a more clever 581 * approach can be used. Currently if we try to find the 582 * mapping for the speculative load while in the kernel, we 583 * might introduce a livelock because of the possibly invalid 584 * values of the address. 585 */ 579 586 istate->cr_ipsr.ed = true; 580 587 return; … … 582 589 583 590 uintptr_t va = istate->cr_ifa; /* faulting address */ 584 585 region_register_t rr; 586 rr.word = rr_read(VA2VRN(va)); 587 rid_t rid = rr.map.rid; 588 if (RID2ASID(rid) == ASID_KERNEL) { 589 if (VA2VRN(va) == VRN_KERNEL) { 591 as_t *as = AS; 592 593 if (is_kernel_fault(va)) { 594 if (va < end_of_identity) { 590 595 /* 591 * Provide KA2PA(identity) mapping for faulting piece of 592 * kernel address space. 596 * Create kernel identity mapping for low memory. 593 597 */ 594 598 dtlb_kernel_mapping_insert(va, KA2PA(va), false, 0); 595 599 return; 600 } else { 601 as = AS_KERNEL; 596 602 } 597 603 } 598 604 599 605 600 page_table_lock(AS, true); 601 pte_t *entry = page_mapping_find(AS, va, true); 606 pte_t *entry = page_mapping_find(as, va, true); 602 607 if (entry) { 603 608 /* … … 606 611 */ 607 612 dtc_pte_copy(entry); 608 page_table_unlock(AS, true);609 613 } else { 610 page_table_unlock(AS, true);611 614 if (try_memmap_io_insertion(va, istate)) 612 615 return; … … 647 650 uintptr_t va; 648 651 pte_t *t; 652 as_t *as = AS; 649 653 650 654 va = istate->cr_ifa; /* faulting address */ 651 655 652 page_table_lock(AS, true); 653 t = page_mapping_find(AS, va, true); 656 if (is_kernel_fault(va)) 657 as = AS_KERNEL; 658 659 t = page_mapping_find(as, va, true); 654 660 ASSERT((t) && (t->p)); 655 661 if ((t) && (t->p) && (t->w)) { … … 667 673 } 668 674 } 669 page_table_unlock(AS, true);670 675 } 671 676 … … 682 687 683 688 va = istate->cr_ifa; /* faulting address */ 684 685 page_table_lock(AS, true); 689 690 ASSERT(!is_kernel_fault(va)); 691 686 692 t = page_mapping_find(AS, va, true); 687 693 ASSERT((t) && (t->p)); … … 700 706 } 701 707 } 702 page_table_unlock(AS, true);703 708 } 704 709 … … 713 718 uintptr_t va; 714 719 pte_t *t; 720 as_t *as = AS; 715 721 716 722 va = istate->cr_ifa; /* faulting address */ 717 723 718 page_table_lock(AS, true); 719 t = page_mapping_find(AS, va, true); 724 if (is_kernel_fault(va)) 725 as = AS_KERNEL; 726 727 t = page_mapping_find(as, va, true); 720 728 ASSERT((t) && (t->p)); 721 729 if ((t) && (t->p)) { … … 733 741 } 734 742 } 735 page_table_unlock(AS, true);736 743 } 737 744 … … 748 755 749 756 va = istate->cr_ifa; /* faulting address */ 757 758 ASSERT(!is_kernel_fault(va)); 750 759 751 760 /* 752 761 * Assume a write to a read-only page. 753 762 */ 754 page_table_lock(AS, true);755 763 t = page_mapping_find(AS, va, true); 756 764 ASSERT((t) && (t->p)); … … 761 769 panic_memtrap(istate, PF_ACCESS_WRITE, va, NULL); 762 770 } 763 page_table_unlock(AS, true);764 771 } 765 772 … … 777 784 va = istate->cr_ifa; /* faulting address */ 778 785 779 page_table_lock(AS, true); 786 ASSERT(!is_kernel_fault(va)); 787 780 788 t = page_mapping_find(AS, va, true); 781 789 ASSERT(t); … … 790 798 else 791 799 dtc_pte_copy(t); 792 page_table_unlock(AS, true);793 800 } else { 794 page_table_unlock(AS, true);795 801 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { 796 802 fault_if_from_uspace(istate, "Page fault at %p.", -
kernel/arch/ia64/src/start.S
rbd5f3b7 r00aece0 38 38 #define KERNEL_TRANSLATION_I 0x0010000000000661 39 39 #define KERNEL_TRANSLATION_D 0x0010000000000661 40 #define KERNEL_TRANSLATION_VIO 0x001000000000067141 #define KERNEL_TRANSLATION_IO 0x00100FFFFC00067142 #define KERNEL_TRANSLATION_FW 0x00100000F000067143 40 44 41 .section K_TEXT_START, "ax" … … 88 85 itr.d dtr[r0] = r10 89 86 90 movl r7 = 1 91 movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET 92 mov cr.ifa = r8 93 movl r10 = (KERNEL_TRANSLATION_VIO) 94 itr.d dtr[r7] = r10 95 96 mov r11 = cr.itir 97 movl r10 = ~0xfc 98 and r10 = r10, r11 99 movl r11 = (IO_PAGE_WIDTH << PS_SHIFT) 100 or r10 = r10, r11 101 mov cr.itir = r10 102 103 movl r7 = 2 104 movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET 105 mov cr.ifa = r8 106 movl r10 = (KERNEL_TRANSLATION_IO) 107 itr.d dtr[r7] = r10 108 109 # Setup mapping for firmware area (also SAPIC) 110 111 mov r11 = cr.itir 112 movl r10 = ~0xfc 113 and r10 = r10, r11 114 movl r11 = (FW_PAGE_WIDTH << PS_SHIFT) 115 or r10 = r10, r11 116 mov cr.itir = r10 117 118 movl r7 = 3 119 movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET 120 mov cr.ifa = r8 121 movl r10 = (KERNEL_TRANSLATION_FW) 122 itr.d dtr[r7] = r10 123 124 # Initialize DSR 87 # Initialize DCR 125 88 126 89 movl r10 = (DCR_DP_MASK | DCR_DK_MASK | DCR_DX_MASK | DCR_DR_MASK | DCR_DA_MASK | DCR_DD_MASK | DCR_LC_MASK) … … 156 119 * Now we are paging. 157 120 */ 121 122 # 123 # Set Interruption Vector Address 124 # (i.e. location of interruption vector table) 125 # 126 movl r8 = ivt ;; 127 mov cr.iva = r8 128 srlz.d ;; 129 158 130 159 131 # Switch to register bank 1 … … 167 139 168 140 # 169 # Initialize memory stack to some sane value and allocate a scratch are 141 # Initialize memory stack to some sane value and allocate a scratch area 170 142 # on it. 171 143 # -
kernel/arch/mips32/Makefile.inc
rbd5f3b7 r00aece0 63 63 arch/$(KARCH)/src/debug/stacktrace.c \ 64 64 arch/$(KARCH)/src/debug/stacktrace_asm.S \ 65 arch/$(KARCH)/src/mm/km.c \ 65 66 arch/$(KARCH)/src/mm/frame.c \ 66 67 arch/$(KARCH)/src/mm/page.c \ -
kernel/arch/mips32/include/mm/as.h
rbd5f3b7 r00aece0 39 39 40 40 #define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) 41 #define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0x 9fffffff)41 #define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) 42 42 #define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) 43 43 #define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) -
kernel/arch/mips32/include/mm/frame.h
rbd5f3b7 r00aece0 41 41 #ifndef __ASM__ 42 42 43 extern void frame_arch_init(void); 43 extern void frame_low_arch_init(void); 44 extern void frame_high_arch_init(void); 44 45 extern void physmem_print(void); 45 46 -
kernel/arch/mips32/src/mips32.c
rbd5f3b7 r00aece0 34 34 35 35 #include <arch.h> 36 #include <arch/cp0.h> 37 #include <arch/exception.h> 38 #include <arch/debug.h> 39 #include <mm/as.h> 36 #include <typedefs.h> 37 #include <errno.h> 38 #include <interrupt.h> 39 #include <macros.h> 40 #include <str.h> 41 #include <memstr.h> 40 42 #include <userspace.h> 41 #include <memstr.h>42 #include <proc/thread.h>43 #include <abi/proc/uarg.h>44 #include <print.h>45 43 #include <console/console.h> 46 44 #include <syscall/syscall.h> 47 45 #include <sysinfo/sysinfo.h> 48 #include <arch/interrupt.h> 49 #include <interrupt.h> 50 #include <console/chardev.h> 51 #include <arch/barrier.h> 46 #include <arch/debug.h> 52 47 #include <arch/debugger.h> 48 #include <arch/drivers/msim.h> 53 49 #include <genarch/fb/fb.h> 54 #include <abi/fb/visuals.h>55 50 #include <genarch/drivers/dsrln/dsrlnin.h> 56 51 #include <genarch/drivers/dsrln/dsrlnout.h> 57 52 #include <genarch/srln/srln.h> 58 #include <macros.h>59 #include <config.h>60 #include <str.h>61 #include <arch/drivers/msim.h>62 #include <arch/asm/regname.h>63 53 64 54 /* Size of the code jumping to the exception handler code … … 88 78 size_t i; 89 79 for (i = 0; i < init.cnt; i++) { 90 init.tasks[i]. addr = (uintptr_t) bootinfo->tasks[i].addr;80 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr); 91 81 init.tasks[i].size = bootinfo->tasks[i].size; 92 82 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, … … 206 196 sysinfo_set_item_val("kbd", NULL, true); 207 197 sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); 208 sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); 198 sysinfo_set_item_val("kbd.address.physical", NULL, 199 PA2KA(MSIM_KBD_ADDRESS)); 209 200 #endif 210 201 } … … 248 239 * possible to have it separately in the future. 249 240 */ 250 sysarg_t sys_tls_set( sysarg_t addr)251 { 252 return 0;241 sysarg_t sys_tls_set(uintptr_t addr) 242 { 243 return EOK; 253 244 } 254 245 -
kernel/arch/mips32/src/mm/frame.c
rbd5f3b7 r00aece0 123 123 for (i = 0; i < init.cnt; i++) 124 124 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, 125 KA2PA(init.tasks[i].addr), init.tasks[i].size)) {125 init.tasks[i].paddr, init.tasks[i].size)) { 126 126 safe = false; 127 127 break; … … 131 131 } 132 132 133 static void frame_add_region(pfn_t start_frame, pfn_t end_frame) 134 { 135 if (end_frame > start_frame) { 136 /* Convert 1M frames to 16K frames */ 137 pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); 138 pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); 139 133 static void frame_add_region(pfn_t start_frame, pfn_t end_frame, bool low) 134 { 135 if (end_frame <= start_frame) 136 return; 137 138 uintptr_t base = start_frame << ZERO_PAGE_WIDTH; 139 size_t size = (end_frame - start_frame) << ZERO_PAGE_WIDTH; 140 141 if (!frame_adjust_zone_bounds(low, &base, &size)) 142 return; 143 144 pfn_t first = ADDR2PFN(base); 145 size_t count = SIZE2FRAMES(size); 146 pfn_t conf_frame; 147 148 if (low) { 140 149 /* Interrupt vector frame is blacklisted */ 141 pfn_t conf_frame;142 150 if (first == 0) 143 151 conf_frame = 1; 144 152 else 145 153 conf_frame = first; 146 147 zone_create(first, count, conf_frame, 0); 148 149 if (phys_regions_count < MAX_REGIONS) { 150 phys_regions[phys_regions_count].start = first; 151 phys_regions[phys_regions_count].count = count; 152 phys_regions_count++; 153 } 154 zone_create(first, count, conf_frame, 155 ZONE_AVAILABLE | ZONE_LOWMEM); 156 } else { 157 conf_frame = zone_external_conf_alloc(count); 158 if (conf_frame != 0) 159 zone_create(first, count, conf_frame, 160 ZONE_AVAILABLE | ZONE_HIGHMEM); 161 } 162 163 if (phys_regions_count < MAX_REGIONS) { 164 phys_regions[phys_regions_count].start = first; 165 phys_regions[phys_regions_count].count = count; 166 phys_regions_count++; 154 167 } 155 168 } … … 165 178 * 166 179 */ 167 void frame_ arch_init(void)180 void frame_low_arch_init(void) 168 181 { 169 182 ipl_t ipl = interrupts_disable(); … … 224 237 225 238 if (!avail) { 226 frame_add_region(start_frame, frame );239 frame_add_region(start_frame, frame, true); 227 240 start_frame = frame + 1; 228 241 avail = true; … … 230 243 } 231 244 232 frame_add_region(start_frame, frame );245 frame_add_region(start_frame, frame, true); 233 246 234 247 /* Blacklist interrupt vector frame */ … … 246 259 } 247 260 261 void frame_high_arch_init(void) 262 { 263 } 248 264 249 265 void physmem_print(void) -
kernel/arch/mips32/src/mm/page.c
rbd5f3b7 r00aece0 41 41 { 42 42 page_mapping_operations = &pt_mapping_operations; 43 } 44 45 /** Map device into kernel space 46 * - on mips, all devices are already mapped into kernel space, 47 * translate the physical address to uncached area 48 */ 49 uintptr_t hw_map(uintptr_t physaddr, size_t size) 50 { 51 return physaddr + 0xa0000000; 43 as_switch(NULL, AS_KERNEL); 52 44 } 53 45 -
kernel/arch/mips32/src/mm/tlb.c
rbd5f3b7 r00aece0 95 95 96 96 badvaddr = cp0_badvaddr_read(); 97 98 mutex_lock(&AS->lock);99 97 asid = AS->asid; 100 mutex_unlock(&AS->lock);101 98 102 99 pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc); -
kernel/arch/mips64/Makefile.inc
rbd5f3b7 r00aece0 55 55 arch/$(KARCH)/src/debug/stacktrace.c \ 56 56 arch/$(KARCH)/src/debug/stacktrace_asm.S \ 57 arch/$(KARCH)/src/mm/km.c \ 57 58 arch/$(KARCH)/src/mm/frame.c \ 58 59 arch/$(KARCH)/src/mm/page.c \ -
kernel/arch/mips64/include/mm/frame.h
rbd5f3b7 r00aece0 41 41 #ifndef __ASM__ 42 42 43 extern void frame_arch_init(void); 43 extern void frame_low_arch_init(void); 44 extern void frame_high_arch_init(void); 44 45 extern void physmem_print(void); 45 46 -
kernel/arch/mips64/src/mips64.c
rbd5f3b7 r00aece0 34 34 35 35 #include <arch.h> 36 #include <arch/cp0.h> 37 #include <arch/exception.h> 38 #include <arch/debug.h> 39 #include <mm/as.h> 36 #include <typedefs.h> 37 #include <errno.h> 38 #include <interrupt.h> 39 #include <macros.h> 40 #include <str.h> 41 #include <memstr.h> 40 42 #include <userspace.h> 41 #include <memstr.h>42 #include <proc/thread.h>43 #include <abi/proc/uarg.h>44 #include <print.h>45 43 #include <console/console.h> 46 44 #include <syscall/syscall.h> 47 45 #include <sysinfo/sysinfo.h> 48 #include <arch/interrupt.h> 49 #include <interrupt.h> 50 #include <console/chardev.h> 51 #include <arch/barrier.h> 46 #include <arch/debug.h> 52 47 #include <arch/debugger.h> 48 #include <arch/drivers/msim.h> 53 49 #include <genarch/fb/fb.h> 54 #include <abi/fb/visuals.h>55 50 #include <genarch/drivers/dsrln/dsrlnin.h> 56 51 #include <genarch/drivers/dsrln/dsrlnout.h> 57 52 #include <genarch/srln/srln.h> 58 #include <macros.h>59 #include <config.h>60 #include <str.h>61 #include <arch/drivers/msim.h>62 #include <arch/asm/regname.h>63 53 64 54 /* Size of the code jumping to the exception handler code … … 88 78 size_t i; 89 79 for (i = 0; i < init.cnt; i++) { 90 init.tasks[i]. addr = (uintptr_t) bootinfo->tasks[i].addr;80 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr); 91 81 init.tasks[i].size = bootinfo->tasks[i].size; 92 82 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, … … 226 216 * possible to have it separately in the future. 227 217 */ 228 sysarg_t sys_tls_set( sysarg_t addr)229 { 230 return 0;218 sysarg_t sys_tls_set(uintptr_t addr) 219 { 220 return EOK; 231 221 } 232 222 -
kernel/arch/mips64/src/mm/frame.c
rbd5f3b7 r00aece0 115 115 for (i = 0; i < init.cnt; i++) 116 116 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, 117 KA2PA(init.tasks[i].addr), init.tasks[i].size)) {117 init.tasks[i].paddr, init.tasks[i].size)) { 118 118 safe = false; 119 119 break; … … 123 123 } 124 124 125 static void frame_add_region(pfn_t start_frame, pfn_t end_frame) 126 { 127 if (end_frame > start_frame) { 128 /* Convert 1M frames to 16K frames */ 129 pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); 130 pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); 131 125 static void frame_add_region(pfn_t start_frame, pfn_t end_frame, bool low) 126 { 127 if (end_frame <= start_frame) 128 return; 129 130 uintptr_t base = start_frame << ZERO_PAGE_WIDTH; 131 size_t size = (end_frame - start_frame) << ZERO_PAGE_WIDTH; 132 133 if (!frame_adjust_zone_bounds(low, &base, &size)) 134 return; 135 136 pfn_t first = ADDR2PFN(base); 137 size_t count = SIZE2FRAMES(size); 138 pfn_t conf_frame; 139 140 if (low) { 132 141 /* Interrupt vector frame is blacklisted */ 133 pfn_t conf_frame;134 142 if (first == 0) 135 143 conf_frame = 1; 136 144 else 137 145 conf_frame = first; 138 139 zone_create(first, count, conf_frame, 0); 140 141 if (phys_regions_count < MAX_REGIONS) { 142 phys_regions[phys_regions_count].start = first; 143 phys_regions[phys_regions_count].count = count; 144 phys_regions_count++; 145 } 146 zone_create(first, count, conf_frame, 147 ZONE_AVAILABLE | ZONE_LOWMEM); 148 } else { 149 conf_frame = zone_external_conf_alloc(count); 150 if (conf_frame != 0) 151 zone_create(first, count, conf_frame, 152 ZONE_AVAILABLE | ZONE_HIGHMEM); 153 } 154 155 if (phys_regions_count < MAX_REGIONS) { 156 phys_regions[phys_regions_count].start = first; 157 phys_regions[phys_regions_count].count = count; 158 phys_regions_count++; 146 159 } 147 160 } … … 156 169 * 157 170 */ 158 void frame_ arch_init(void)171 void frame_low_arch_init(void) 159 172 { 160 173 ipl_t ipl = interrupts_disable(); … … 207 220 208 221 if (!avail) { 209 frame_add_region(start_frame, frame );222 frame_add_region(start_frame, frame, true); 210 223 start_frame = frame + 1; 211 224 avail = true; … … 213 226 } 214 227 215 frame_add_region(start_frame, frame );228 frame_add_region(start_frame, frame, true); 216 229 217 230 /* Blacklist interrupt vector frame */ … … 229 242 } 230 243 244 void frame_high_arch_init(void) 245 { 246 } 247 231 248 void physmem_print(void) 232 249 { -
kernel/arch/mips64/src/mm/page.c
rbd5f3b7 r00aece0 43 43 } 44 44 45 /** Map device into kernel space46 * - on mips, all devices are already mapped into kernel space,47 * translate the physical address to uncached area48 */49 uintptr_t hw_map(uintptr_t physaddr, size_t size)50 {51 return physaddr + 0xffffffffa0000000;52 }53 54 45 /** @} 55 46 */ -
kernel/arch/ppc32/Makefile.inc
rbd5f3b7 r00aece0 52 52 arch/$(KARCH)/src/proc/scheduler.c \ 53 53 arch/$(KARCH)/src/ddi/ddi.c \ 54 arch/$(KARCH)/src/mm/km.c \ 54 55 arch/$(KARCH)/src/mm/as.c \ 55 56 arch/$(KARCH)/src/mm/frame.c \ -
kernel/arch/ppc32/include/mm/frame.h
rbd5f3b7 r00aece0 44 44 #include <trace.h> 45 45 46 extern uintptr_t last_frame;47 48 46 NO_TRACE static inline uint32_t physmem_top(void) 49 47 { … … 58 56 } 59 57 60 extern void frame_arch_init(void); 58 extern void frame_low_arch_init(void); 59 extern void frame_high_arch_init(void); 61 60 extern void physmem_print(void); 62 61 -
kernel/arch/ppc32/src/drivers/pic.c
rbd5f3b7 r00aece0 34 34 35 35 #include <arch/drivers/pic.h> 36 #include <mm/ page.h>36 #include <mm/km.h> 37 37 #include <byteorder.h> 38 38 #include <bitops.h> … … 42 42 void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg) 43 43 { 44 pic = (uint32_t *) hw_map(base, size);44 pic = (uint32_t *) km_map(base, size, PAGE_WRITE | PAGE_NOT_CACHEABLE); 45 45 *cir = pic_ack_interrupt; 46 46 *cir_arg = NULL; -
kernel/arch/ppc32/src/mm/frame.c
rbd5f3b7 r00aece0 40 40 #include <print.h> 41 41 42 uintptr_t last_frame = 0;43 42 memmap_t memmap; 44 43 … … 54 53 } 55 54 56 void frame_arch_init(void)55 static void frame_common_arch_init(bool low) 57 56 { 58 57 pfn_t minconf = 2; … … 61 60 for (i = 0; i < memmap.cnt; i++) { 62 61 /* To be safe, make the available zone possibly smaller */ 63 uintptr_t new_start= ALIGN_UP((uintptr_t) memmap.zones[i].start,62 uintptr_t base = ALIGN_UP((uintptr_t) memmap.zones[i].start, 64 63 FRAME_SIZE); 65 size_t new_size = ALIGN_DOWN(memmap.zones[i].size -66 ( new_start- ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE);64 size_t size = ALIGN_DOWN(memmap.zones[i].size - 65 (base - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE); 67 66 68 pfn_t pfn = ADDR2PFN(new_start); 69 size_t count = SIZE2FRAMES(new_size); 70 67 if (!frame_adjust_zone_bounds(low, &base, &size)) 68 return; 69 70 pfn_t pfn = ADDR2PFN(base); 71 size_t count = SIZE2FRAMES(size); 71 72 pfn_t conf; 72 if ((minconf < pfn) || (minconf >= pfn + count)) 73 conf = pfn; 74 else 75 conf = minconf; 76 77 zone_create(pfn, count, conf, 0); 78 79 if (last_frame < ALIGN_UP(new_start + new_size, FRAME_SIZE)) 80 last_frame = ALIGN_UP(new_start + new_size, FRAME_SIZE); 73 74 if (low) { 75 if ((minconf < pfn) || (minconf >= pfn + count)) 76 conf = pfn; 77 else 78 conf = minconf; 79 zone_create(pfn, count, conf, 80 ZONE_AVAILABLE | ZONE_LOWMEM); 81 } else { 82 conf = zone_external_conf_alloc(count); 83 if (conf != 0) 84 zone_create(pfn, count, conf, 85 ZONE_AVAILABLE | ZONE_HIGHMEM); 86 } 81 87 } 88 89 } 90 91 void frame_low_arch_init(void) 92 { 93 frame_common_arch_init(true); 82 94 83 95 /* First is exception vector, second is 'implementation specific', … … 92 104 } 93 105 106 void frame_high_arch_init(void) 107 { 108 frame_common_arch_init(false); 109 } 110 94 111 /** @} 95 112 */ -
kernel/arch/ppc32/src/mm/page.c
rbd5f3b7 r00aece0 46 46 } 47 47 48 uintptr_t hw_map(uintptr_t physaddr, size_t size)49 {50 if (last_frame + ALIGN_UP(size, PAGE_SIZE) >51 KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))52 panic("Unable to map physical memory %p (%zu bytes).",53 (void *) physaddr, size);54 55 uintptr_t virtaddr = PA2KA(last_frame);56 pfn_t i;57 page_table_lock(AS_KERNEL, true);58 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)59 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i),60 physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);61 page_table_unlock(AS_KERNEL, true);62 63 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);64 65 return virtaddr;66 }67 68 48 /** @} 69 49 */ -
kernel/arch/ppc32/src/ppc32.c
rbd5f3b7 r00aece0 46 46 #include <userspace.h> 47 47 #include <mm/page.h> 48 #include <mm/km.h> 48 49 #include <abi/proc/uarg.h> 49 50 #include <console/console.h> … … 71 72 size_t i; 72 73 for (i = 0; i < init.cnt; i++) { 73 init.tasks[i]. addr = (uintptr_t) bootinfo->taskmap.tasks[i].addr;74 init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr); 74 75 init.tasks[i].size = bootinfo->taskmap.tasks[i].size; 75 76 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, … … 208 209 size_t size = 2 * PAGE_SIZE; 209 210 210 cuda_t *cuda = (cuda_t *) 211 (hw_map(aligned_addr, offset + size) + offset);211 cuda_t *cuda = (cuda_t *) (km_map(aligned_addr, offset + size, 212 PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset); 212 213 213 214 /* Initialize I/O controller */ … … 231 232 sysinfo_set_item_val("cuda.inr", NULL, IRQ_CUDA); 232 233 sysinfo_set_item_val("cuda.address.physical", NULL, pa); 233 sysinfo_set_item_val("cuda.address.kernel", NULL,234 (uintptr_t) cuda);235 234 #endif 236 235 } -
kernel/arch/sparc64/Makefile.inc
rbd5f3b7 r00aece0 68 68 arch/$(KARCH)/src/fpu_context.c \ 69 69 arch/$(KARCH)/src/dummy.s \ 70 arch/$(KARCH)/src/mm/$(USARCH)/km.c \ 70 71 arch/$(KARCH)/src/mm/$(USARCH)/as.c \ 71 72 arch/$(KARCH)/src/mm/$(USARCH)/frame.c \ -
kernel/arch/sparc64/include/mm/sun4u/frame.h
rbd5f3b7 r00aece0 72 72 typedef union frame_address frame_address_t; 73 73 74 extern uintptr_t last_frame;75 74 extern uintptr_t end_of_identity; 76 75 77 extern void frame_arch_init(void); 76 extern void frame_low_arch_init(void); 77 extern void frame_high_arch_init(void); 78 78 #define physmem_print() 79 79 -
kernel/arch/sparc64/include/mm/sun4v/frame.h
rbd5f3b7 r00aece0 46 46 #include <typedefs.h> 47 47 48 extern uintptr_t last_frame;49 extern void frame_ arch_init(void);48 extern void frame_low_arch_init(void); 49 extern void frame_high_arch_init(void); 50 50 #define physmem_print() 51 51 -
kernel/arch/sparc64/src/drivers/kbd.c
rbd5f3b7 r00aece0 40 40 #include <mm/page.h> 41 41 #include <arch/mm/page.h> 42 #include <mm/km.h> 42 43 #include <typedefs.h> 43 44 #include <align.h> … … 113 114 size_t offset = pa - aligned_addr; 114 115 115 ns16550_t *ns16550 = (ns16550_t *) 116 (hw_map(aligned_addr, offset + size) + offset);116 ns16550_t *ns16550 = (ns16550_t *) (km_map(aligned_addr, offset + size, 117 PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset); 117 118 118 119 ns16550_instance_t *ns16550_instance = ns16550_init(ns16550, inr, cir, cir_arg); … … 132 133 sysinfo_set_item_val("kbd", NULL, true); 133 134 sysinfo_set_item_val("kbd.inr", NULL, inr); 134 sysinfo_set_item_val("kbd.address.kernel", NULL,135 (uintptr_t) ns16550);136 135 sysinfo_set_item_val("kbd.address.physical", NULL, pa); 137 136 sysinfo_set_item_val("kbd.type.ns16550", NULL, true); -
kernel/arch/sparc64/src/drivers/pci.c
rbd5f3b7 r00aece0 39 39 #include <genarch/ofw/upa.h> 40 40 #include <arch/trap/interrupt.h> 41 #include <mm/ page.h>41 #include <mm/km.h> 42 42 #include <mm/slab.h> 43 43 #include <typedefs.h> … … 109 109 pci->model = PCI_SABRE; 110 110 pci->op = &pci_sabre_ops; 111 pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size); 111 pci->reg = (uint64_t *) km_map(paddr, reg[SABRE_INTERNAL_REG].size, 112 PAGE_WRITE | PAGE_NOT_CACHEABLE); 112 113 113 114 /* … … 156 157 pci->model = PCI_PSYCHO; 157 158 pci->op = &pci_psycho_ops; 158 pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size); 159 pci->reg = (uint64_t *) km_map(paddr, reg[PSYCHO_INTERNAL_REG].size, 160 PAGE_WRITE | PAGE_NOT_CACHEABLE); 159 161 160 162 /* -
kernel/arch/sparc64/src/mm/page.c
rbd5f3b7 r00aece0 51 51 } 52 52 53 /** Map memory-mapped device into virtual memory.54 *55 * We are currently using identity mapping for mapping device registers.56 *57 * @param physaddr Physical address of the page where the device is58 * located.59 * @param size Size of the device's registers.60 *61 * @return Virtual address of the page where the device is mapped.62 *63 */64 uintptr_t hw_map(uintptr_t physaddr, size_t size)65 {66 return PA2KA(physaddr);67 }68 69 53 /** @} 70 54 */ -
kernel/arch/sparc64/src/mm/sun4u/frame.c
rbd5f3b7 r00aece0 41 41 #include <macros.h> 42 42 43 uintptr_t last_frame = (uintptr_t) NULL;44 45 43 /** Create memory zones according to information stored in memmap. 46 44 * 47 45 * Walk the memory map and create frame zones according to it. 48 46 */ 49 void frame_arch_init(void)47 static void frame_common_arch_init(bool low) 50 48 { 51 if (config.cpu_active == 1) { 52 unsigned int i; 49 unsigned int i; 50 51 for (i = 0; i < memmap.cnt; i++) { 52 uintptr_t base; 53 size_t size; 54 55 /* 56 * The memmap is created by HelenOS boot loader. 57 * It already contains no holes. 58 */ 59 60 /* To be safe, make the available zone possibly smaller */ 61 base = ALIGN_UP((uintptr_t) memmap.zones[i].start, FRAME_SIZE); 62 size = ALIGN_DOWN(memmap.zones[i].size - 63 (base - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE); 53 64 54 for (i = 0; i < memmap.cnt; i++) { 55 /* To be safe, make the available zone possibly smaller */ 56 uintptr_t new_start = ALIGN_UP((uintptr_t) memmap.zones[i].start, 57 FRAME_SIZE); 58 size_t new_size = ALIGN_DOWN(memmap.zones[i].size - 59 (new_start - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE); 60 61 /* 62 * The memmap is created by HelenOS boot loader. 63 * It already contains no holes. 64 */ 65 66 pfn_t confdata = ADDR2PFN(new_start); 67 65 if (!frame_adjust_zone_bounds(low, &base, &size)) 66 continue; 67 68 pfn_t confdata; 69 pfn_t pfn = ADDR2PFN(base); 70 size_t count = SIZE2FRAMES(size); 71 72 if (low) { 73 confdata = pfn; 68 74 if (confdata == ADDR2PFN(KA2PA(PFN2ADDR(0)))) 69 75 confdata = ADDR2PFN(KA2PA(PFN2ADDR(2))); 70 76 71 zone_create(ADDR2PFN(new_start), SIZE2FRAMES(new_size), 72 confdata, 0); 73 74 last_frame = max(last_frame, new_start + new_size); 77 zone_create(pfn, count, confdata, 78 ZONE_AVAILABLE | ZONE_LOWMEM); 79 } else { 80 confdata = zone_external_conf_alloc(count); 81 if (confdata != 0) 82 zone_create(pfn, count, confdata, 83 ZONE_AVAILABLE | ZONE_HIGHMEM); 75 84 } 76 77 /*78 * On sparc64, physical memory can start on a non-zero address.79 * The generic frame_init() only marks PFN 0 as not free, so we80 * must mark the physically first frame not free explicitly81 * here, no matter what is its address.82 */83 frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1);84 85 } 86 } 87 88 void frame_low_arch_init(void) 89 { 90 if (config.cpu_active > 1) 91 return; 85 92 86 end_of_identity = PA2KA(last_frame); 93 frame_common_arch_init(true); 94 95 /* 96 * On sparc64, physical memory can start on a non-zero address. 97 * The generic frame_init() only marks PFN 0 as not free, so we 98 * must mark the physically first frame not free explicitly 99 * here, no matter what is its address. 100 */ 101 frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1); 102 103 /* PA2KA will work only on low-memory. */ 104 end_of_identity = PA2KA(config.physmem_end - FRAME_SIZE) + PAGE_SIZE; 105 } 106 107 void frame_high_arch_init(void) 108 { 109 if (config.cpu_active > 1) 110 return; 111 112 frame_common_arch_init(false); 87 113 } 88 114 -
kernel/arch/sparc64/src/mm/sun4u/tlb.c
rbd5f3b7 r00aece0 206 206 pte_t *t; 207 207 208 page_table_lock(AS, true);209 208 t = page_mapping_find(AS, page_16k, true); 210 209 if (t && PTE_EXECUTABLE(t)) { … … 218 217 itsb_pte_copy(t, index); 219 218 #endif 220 page_table_unlock(AS, true);221 219 } else { 222 220 /* … … 224 222 * handler. 225 223 */ 226 page_table_unlock(AS, true);227 224 if (as_page_fault(page_16k, PF_ACCESS_EXEC, istate) == 228 225 AS_PF_FAULT) { … … 250 247 size_t index; 251 248 pte_t *t; 249 as_t *as = AS; 252 250 253 251 page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH; … … 261 259 "Dereferencing NULL pointer."); 262 260 } else if (page_8k >= end_of_identity) { 263 /* 264 * The kernel is accessing the I/O space. 265 * We still do identity mapping for I/O, 266 * but without caching. 267 */ 268 dtlb_insert_mapping(page_8k, KA2PA(page_8k), 269 PAGESIZE_8K, false, false); 270 return; 261 /* Kernel non-identity. */ 262 as = AS_KERNEL; 263 } else { 264 do_fast_data_access_mmu_miss_fault(istate, tag, 265 "Unexpected kernel page fault."); 271 266 } 272 do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected " 273 "kernel page fault."); 274 } 275 276 page_table_lock(AS, true); 277 t = page_mapping_find(AS, page_16k, true); 267 } 268 269 t = page_mapping_find(as, page_16k, true); 278 270 if (t) { 279 271 /* … … 286 278 dtsb_pte_copy(t, index, true); 287 279 #endif 288 page_table_unlock(AS, true);289 280 } else { 290 281 /* 291 282 * Forward the page fault to the address space page fault 292 283 * handler. 293 */ 294 page_table_unlock(AS, true); 284 */ 295 285 if (as_page_fault(page_16k, PF_ACCESS_READ, istate) == 296 286 AS_PF_FAULT) { … … 314 304 size_t index; 315 305 pte_t *t; 306 as_t *as = AS; 316 307 317 308 page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE); 318 309 index = tag.vpn % MMU_PAGES_PER_PAGE; /* 16K-page emulation */ 319 310 320 page_table_lock(AS, true); 321 t = page_mapping_find(AS, page_16k, true); 311 if (tag.context == ASID_KERNEL) 312 as = AS_KERNEL; 313 314 t = page_mapping_find(as, page_16k, true); 322 315 if (t && PTE_WRITABLE(t)) { 323 316 /* … … 334 327 dtsb_pte_copy(t, index, false); 335 328 #endif 336 page_table_unlock(AS, true);337 329 } else { 338 330 /* … … 340 332 * handler. 341 333 */ 342 page_table_unlock(AS, true);343 334 if (as_page_fault(page_16k, PF_ACCESS_WRITE, istate) == 344 335 AS_PF_FAULT) { -
kernel/arch/sparc64/src/mm/sun4v/frame.c
rbd5f3b7 r00aece0 45 45 * Walk the memory map and create frame zones according to it. 46 46 */ 47 void frame_arch_init(void)47 static void frame_common_arch_init(bool low) 48 48 { 49 if (config.cpu_active == 1) { 50 unsigned int i; 49 unsigned int i; 51 50 52 for (i = 0; i < memmap.cnt; i++) { 53 /* To be safe, make the available zone possibly smaller */ 54 uintptr_t new_start = ALIGN_UP((uintptr_t) memmap.zones[i].start, 55 FRAME_SIZE); 56 size_t new_size = ALIGN_DOWN(memmap.zones[i].size - 57 (new_start - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE); 58 59 /* 60 * The memmap is created by HelenOS boot loader. 61 * It already contains no holes. 62 */ 63 64 pfn_t confdata = ADDR2PFN(new_start); 65 51 for (i = 0; i < memmap.cnt; i++) { 52 uintptr_t base; 53 size_t size; 54 55 /* 56 * The memmap is created by HelenOS boot loader. 57 * It already contains no holes. 58 */ 59 60 /* To be safe, make the available zone possibly smaller */ 61 base = ALIGN_UP((uintptr_t) memmap.zones[i].start, FRAME_SIZE); 62 size = ALIGN_DOWN(memmap.zones[i].size - 63 (base - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE); 64 65 if (!frame_adjust_zone_bounds(low, &base, &size)) 66 continue; 67 68 pfn_t confdata; 69 pfn_t pfn = ADDR2PFN(base); 70 size_t count = SIZE2FRAMES(size); 71 72 if (low) { 73 confdata = pfn; 66 74 if (confdata == ADDR2PFN(KA2PA(PFN2ADDR(0)))) 67 75 confdata = ADDR2PFN(KA2PA(PFN2ADDR(2))); 68 76 69 zone_create(ADDR2PFN(new_start), SIZE2FRAMES(new_size), 70 confdata, 0); 77 zone_create(pfn, count, confdata, 78 ZONE_AVAILABLE | ZONE_LOWMEM); 79 } else { 80 confdata = zone_external_conf_alloc(count); 81 if (confdata != 0) 82 zone_create(pfn, count, confdata, 83 ZONE_AVAILABLE | ZONE_HIGHMEM); 71 84 } 72 73 /*74 * On sparc64, physical memory can start on a non-zero address.75 * The generic frame_init() only marks PFN 0 as not free, so we76 * must mark the physically first frame not free explicitly77 * here, no matter what is its address.78 */79 frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1);80 85 } 86 } 87 88 89 void frame_low_arch_init(void) 90 { 91 if (config.cpu_active > 1) 92 return; 93 94 frame_common_arch_init(true); 95 96 /* 97 * On sparc64, physical memory can start on a non-zero address. 98 * The generic frame_init() only marks PFN 0 as not free, so we 99 * must mark the physically first frame not free explicitly 100 * here, no matter what is its address. 101 */ 102 frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1); 103 } 104 105 void frame_high_arch_init(void) 106 { 107 if (config.cpu_active > 1) 108 return; 109 110 frame_common_arch_init(false); 81 111 } 82 112 -
kernel/arch/sparc64/src/mm/sun4v/tlb.c
rbd5f3b7 r00aece0 218 218 pte_t *t; 219 219 220 page_table_lock(AS, true);221 220 t = page_mapping_find(AS, va, true); 222 221 … … 231 230 itsb_pte_copy(t); 232 231 #endif 233 page_table_unlock(AS, true);234 232 } else { 235 233 /* … … 237 235 * handler. 238 236 */ 239 page_table_unlock(AS, true);240 237 if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { 241 238 do_fast_instruction_access_mmu_miss_fault(istate, … … 274 271 } 275 272 276 page_table_lock(AS, true);277 273 t = page_mapping_find(AS, va, true); 278 274 if (t) { … … 286 282 dtsb_pte_copy(t, true); 287 283 #endif 288 page_table_unlock(AS, true);289 284 } else { 290 285 /* … … 292 287 * handler. 293 288 */ 294 page_table_unlock(AS, true);295 289 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { 296 290 do_fast_data_access_mmu_miss_fault(istate, page_and_ctx, … … 316 310 uint16_t ctx = DMISS_CONTEXT(page_and_ctx); 317 311 318 page_table_lock(AS, true);319 312 t = page_mapping_find(AS, va, true); 320 313 if (t && PTE_WRITABLE(t)) { … … 331 324 dtsb_pte_copy(t, false); 332 325 #endif 333 page_table_unlock(AS, true);334 326 } else { 335 327 /* … … 337 329 * handler. 338 330 */ 339 page_table_unlock(AS, true);340 331 if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) { 341 332 do_fast_data_access_protection_fault(istate, page_and_ctx, -
kernel/arch/sparc64/src/sun4u/sparc64.c
rbd5f3b7 r00aece0 62 62 size_t i; 63 63 for (i = 0; i < init.cnt; i++) { 64 init.tasks[i]. addr = (uintptr_t) bootinfo->taskmap.tasks[i].addr;64 init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr); 65 65 init.tasks[i].size = bootinfo->taskmap.tasks[i].size; 66 66 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, -
kernel/arch/sparc64/src/sun4v/sparc64.c
rbd5f3b7 r00aece0 64 64 size_t i; 65 65 for (i = 0; i < init.cnt; i++) { 66 init.tasks[i]. addr = (uintptr_t) bootinfo->taskmap.tasks[i].addr;66 init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr); 67 67 init.tasks[i].size = bootinfo->taskmap.tasks[i].size; 68 68 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
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