source: mainline/kernel/arch/mips32/src/mm/frame.c@ 32817cc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 32817cc was 32817cc, checked in by Jakub Jermar <jakub@…>, 13 years ago

Make the kernel ready for init tasks loaded to high memory.
  • Property mode set to 100644
File size: 7.1 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips32mm
30 * @{
31 */
32/** @file
33 */
34
35#include <macros.h>
36#include <arch/mm/frame.h>
37#include <arch/mm/tlb.h>
38#include <interrupt.h>
39#include <mm/frame.h>
40#include <mm/asid.h>
41#include <config.h>
42#include <arch/drivers/msim.h>
43#include <print.h>
44
45#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
46#define ZERO_FRAMES 2048
47#define ZERO_PAGE_WIDTH 18 /* 256K */
48#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
49#define ZERO_PAGE_ASID ASID_INVALID
50#define ZERO_PAGE_TLBI 0
51#define ZERO_PAGE_ADDR 0
52#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
53#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
54
55#define ZERO_PAGE_VALUE_KSEG1(frame) \
56 (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
57
58#define MAX_REGIONS 32
59
60typedef struct {
61 pfn_t start;
62 pfn_t count;
63} phys_region_t;
64
65static size_t phys_regions_count = 0;
66static phys_region_t phys_regions[MAX_REGIONS];
67
68/** Check whether frame is available
69 *
70 * Returns true if given frame is generally available for use.
71 * Returns false if given frame is used for physical memory
72 * mapped devices and cannot be used.
73 *
74 */
75static bool frame_available(pfn_t frame)
76{
77#ifdef MACHINE_msim
78 /* MSIM device (dprinter) */
79 if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
80 return false;
81
82 /* MSIM device (dkeyboard) */
83 if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
84 return false;
85#endif
86
87#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
88 /* gxemul devices */
89 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
90 0x10000000, MiB2SIZE(256)))
91 return false;
92#endif
93
94 return true;
95}
96
97
98/** Check whether frame is safe to write
99 *
100 * Returns true if given frame is safe for read/write test.
101 * Returns false if given frame should not be touched.
102 *
103 */
104static bool frame_safe(pfn_t frame)
105{
106 /* Kernel structures */
107 if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
108 return false;
109
110 /* Kernel */
111 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
112 KA2PA(config.base), config.kernel_size))
113 return false;
114
115 /* Kernel stack */
116 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
117 KA2PA(config.stack_base), config.stack_size))
118 return false;
119
120 /* Init tasks */
121 bool safe = true;
122 size_t i;
123 for (i = 0; i < init.cnt; i++)
124 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
125 init.tasks[i].paddr, init.tasks[i].size)) {
126 safe = false;
127 break;
128 }
129
130 return safe;
131}
132
133static void frame_add_region(pfn_t start_frame, pfn_t end_frame, bool low)
134{
135 if (end_frame <= start_frame)
136 return;
137
138 uintptr_t base = start_frame << ZERO_PAGE_WIDTH;
139 size_t size = (end_frame - start_frame) << ZERO_PAGE_WIDTH;
140
141 if (!frame_adjust_zone_bounds(low, &base, &size))
142 return;
143
144 pfn_t first = ADDR2PFN(base);
145 size_t count = SIZE2FRAMES(size);
146 pfn_t conf_frame;
147
148 if (low) {
149 /* Interrupt vector frame is blacklisted */
150 if (first == 0)
151 conf_frame = 1;
152 else
153 conf_frame = first;
154 zone_create(first, count, conf_frame,
155 ZONE_AVAILABLE | ZONE_LOWMEM);
156 } else {
157 conf_frame = zone_external_conf_alloc(count);
158 if (conf_frame != 0)
159 zone_create(first, count, conf_frame,
160 ZONE_AVAILABLE | ZONE_HIGHMEM);
161 }
162
163 if (phys_regions_count < MAX_REGIONS) {
164 phys_regions[phys_regions_count].start = first;
165 phys_regions[phys_regions_count].count = count;
166 phys_regions_count++;
167 }
168}
169
170
171/** Create memory zones
172 *
173 * Walk through available 256 KB chunks of physical
174 * memory and create zones.
175 *
176 * Note: It is assumed that the TLB is not yet being
177 * used in any way, thus there is no interference.
178 *
179 */
180void frame_low_arch_init(void)
181{
182 ipl_t ipl = interrupts_disable();
183
184 /* Clear and initialize TLB */
185 cp0_pagemask_write(ZERO_PAGE_MASK);
186 cp0_entry_lo0_write(0);
187 cp0_entry_lo1_write(0);
188 cp0_entry_hi_write(0);
189
190 size_t i;
191 for (i = 0; i < TLB_ENTRY_COUNT; i++) {
192 cp0_index_write(i);
193 tlbwi();
194 }
195
196 pfn_t start_frame = 0;
197 pfn_t frame;
198 bool avail = true;
199
200 /* Walk through all 1 MB frames */
201 for (frame = 0; frame < ZERO_FRAMES; frame++) {
202 if (!frame_available(frame))
203 avail = false;
204 else {
205 if (frame_safe(frame)) {
206 entry_lo_t lo0;
207 entry_lo_t lo1;
208 entry_hi_t hi;
209 tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
210 tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
211 tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
212
213 cp0_pagemask_write(ZERO_PAGE_MASK);
214 cp0_entry_lo0_write(lo0.value);
215 cp0_entry_lo1_write(lo1.value);
216 cp0_entry_hi_write(hi.value);
217 cp0_index_write(ZERO_PAGE_TLBI);
218 tlbwi();
219
220 ZERO_PAGE_VALUE = 0;
221 if (ZERO_PAGE_VALUE != 0)
222 avail = false;
223 else {
224 ZERO_PAGE_VALUE = 0xdeadbeef;
225 if (ZERO_PAGE_VALUE != 0xdeadbeef)
226 avail = false;
227#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
228 else {
229 ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
230 if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
231 avail = false;
232 }
233#endif
234 }
235 }
236 }
237
238 if (!avail) {
239 frame_add_region(start_frame, frame, true);
240 start_frame = frame + 1;
241 avail = true;
242 }
243 }
244
245 frame_add_region(start_frame, frame, true);
246
247 /* Blacklist interrupt vector frame */
248 frame_mark_unavailable(0, 1);
249
250 /* Cleanup */
251 cp0_pagemask_write(ZERO_PAGE_MASK);
252 cp0_entry_lo0_write(0);
253 cp0_entry_lo1_write(0);
254 cp0_entry_hi_write(0);
255 cp0_index_write(ZERO_PAGE_TLBI);
256 tlbwi();
257
258 interrupts_restore(ipl);
259}
260
261void frame_high_arch_init(void)
262{
263}
264
265void physmem_print(void)
266{
267 printf("[base ] [size ]\n");
268
269 size_t i;
270 for (i = 0; i < phys_regions_count; i++) {
271 printf("%#010x %10u\n",
272 PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
273 }
274}
275
276/** @}
277 */
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