source: mainline/kernel/arch/ia32/src/smp/smp.c@ c0699467

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c0699467 was c0699467, checked in by Martin Decky <martin@…>, 14 years ago

do not provide general access to kernel headers from uspace, only allow specific headers to be accessed or shared
externalize headers which serve as kernel/uspace API/ABI into a special tree

  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Copyright (c) 2008 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#include <smp/smp.h>
36#include <arch/smp/smp.h>
37#include <arch/smp/mps.h>
38#include <arch/smp/ap.h>
39#include <arch/boot/boot.h>
40#include <genarch/acpi/acpi.h>
41#include <genarch/acpi/madt.h>
42#include <config.h>
43#include <synch/waitq.h>
44#include <arch/pm.h>
45#include <func.h>
46#include <panic.h>
47#include <debug.h>
48#include <arch/asm.h>
49#include <mm/frame.h>
50#include <mm/page.h>
51#include <mm/slab.h>
52#include <mm/as.h>
53#include <print.h>
54#include <memstr.h>
55#include <arch/drivers/i8259.h>
56
57#ifdef CONFIG_SMP
58
59static struct smp_config_operations *ops = NULL;
60
61void smp_init(void)
62{
63 if (acpi_madt) {
64 acpi_madt_parse();
65 ops = &madt_config_operations;
66 }
67
68 if (config.cpu_count == 1) {
69 mps_init();
70 ops = &mps_config_operations;
71 }
72
73 if (config.cpu_count > 1) {
74 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE);
75 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE);
76 }
77}
78
79/*
80 * Kernel thread for bringing up application processors. It becomes clear
81 * that we need an arrangement like this (AP's being initialized by a kernel
82 * thread), for a thread has its dedicated stack. (The stack used during the
83 * BSP initialization (prior the very first call to scheduler()) will be used
84 * as an initialization stack for each AP.)
85 */
86void kmp(void *arg __attribute__((unused)))
87{
88 unsigned int i;
89
90 ASSERT(ops != NULL);
91
92 /*
93 * We need to access data in frame 0.
94 * We boldly make use of kernel address space mapping.
95 */
96
97 /*
98 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
99 */
100 *((uint16_t *) (PA2KA(0x467 + 0))) =
101 (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */
102 *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */
103
104 /*
105 * Save 0xa to address 0xf of the CMOS RAM.
106 * BIOS will not do the POST after the INIT signal.
107 */
108 pio_write_8((ioport8_t *) 0x70, 0xf);
109 pio_write_8((ioport8_t *) 0x71, 0xa);
110
111 pic_disable_irqs(0xffff);
112 apic_init();
113
114 for (i = 0; i < config.cpu_count; i++) {
115 /*
116 * Skip processors marked unusable.
117 */
118 if (!ops->cpu_enabled(i))
119 continue;
120
121 /*
122 * The bootstrap processor is already up.
123 */
124 if (ops->cpu_bootstrap(i))
125 continue;
126
127 if (ops->cpu_apic_id(i) == bsp_l_apic) {
128 printf("kmp: bad processor entry #%u, will not send IPI "
129 "to myself\n", i);
130 continue;
131 }
132
133 /*
134 * Prepare new GDT for CPU in question.
135 */
136
137 /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
138 * it needs to be replaced by a generic fuctionality of
139 * the memory subsystem
140 */
141 descriptor_t *gdt_new =
142 (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t),
143 FRAME_ATOMIC);
144 if (!gdt_new)
145 panic("Cannot allocate memory for GDT.");
146
147 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
148 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
149 protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
150 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
151 gdtr.base = (uintptr_t) gdt_new;
152
153 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
154 /*
155 * There may be just one AP being initialized at
156 * the time. After it comes completely up, it is
157 * supposed to wake us up.
158 */
159 if (waitq_sleep_timeout(&ap_completion_wq, 1000000,
160 SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {
161 printf("%s: waiting for cpu%u (APIC ID = %d) "
162 "timed out\n", __FUNCTION__, i,
163 ops->cpu_apic_id(i));
164 }
165 } else
166 printf("INIT IPI for l_apic%d failed\n",
167 ops->cpu_apic_id(i));
168 }
169}
170
171int smp_irq_to_pin(unsigned int irq)
172{
173 ASSERT(ops != NULL);
174 return ops->irq_to_pin(irq);
175}
176
177#endif /* CONFIG_SMP */
178
179/** @}
180 */
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