Changeset ec443d5 in mainline for kernel/arch/sparc64/src/trap/sun4u/trap_table.S
- Timestamp:
- 2014-10-20T20:38:13Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- d70ebffe
- Parents:
- 416ef49
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/trap/sun4u/trap_table.S
r416ef49 rec443d5 63 63 instruction_access_exception_tl0: 64 64 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 65 PREEMPTIBLE_HANDLER instruction_access_exception 65 mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2 66 PREEMPTIBLE_HANDLER exc_dispatch 66 67 67 68 /* TT = 0x0a, TL = 0, instruction_access_error */ … … 69 70 .global instruction_access_error_tl0 70 71 instruction_access_error_tl0: 71 PREEMPTIBLE_HANDLER instruction_access_error 72 mov TT_INSTRUCTION_ACCESS_ERROR, %g2 73 PREEMPTIBLE_HANDLER exc_dispatch 72 74 73 75 /* TT = 0x10, TL = 0, illegal_instruction */ … … 75 77 .global illegal_instruction_tl0 76 78 illegal_instruction_tl0: 77 PREEMPTIBLE_HANDLER illegal_instruction 79 mov TT_ILLEGAL_INSTRUCTION, %g2 80 PREEMPTIBLE_HANDLER exc_dispatch 78 81 79 82 /* TT = 0x11, TL = 0, privileged_opcode */ … … 81 84 .global privileged_opcode_tl0 82 85 privileged_opcode_tl0: 83 PREEMPTIBLE_HANDLER privileged_opcode 86 mov TT_PRIVILEGED_OPCODE, %g2 87 PREEMPTIBLE_HANDLER exc_dispatch 84 88 85 89 /* TT = 0x12, TL = 0, unimplemented_LDD */ … … 87 91 .global unimplemented_LDD_tl0 88 92 unimplemented_LDD_tl0: 89 PREEMPTIBLE_HANDLER unimplemented_LDD 93 mov TT_UNIMPLEMENTED_LDD, %g2 94 PREEMPTIBLE_HANDLER exc_dispatch 90 95 91 96 /* TT = 0x13, TL = 0, unimplemented_STD */ … … 93 98 .global unimplemented_STD_tl0 94 99 unimplemented_STD_tl0: 95 PREEMPTIBLE_HANDLER unimplemented_STD 100 mov TT_UNIMPLEMENTED_STD, %g2 101 PREEMPTIBLE_HANDLER exc_dispatch 96 102 97 103 /* TT = 0x20, TL = 0, fb_disabled handler */ … … 99 105 .global fb_disabled_tl0 100 106 fp_disabled_tl0: 101 PREEMPTIBLE_HANDLER fp_disabled 107 mov TT_FP_DISABLED, %g2 108 PREEMPTIBLE_HANDLER exc_dispatch 102 109 103 110 /* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */ … … 105 112 .global fb_exception_ieee_754_tl0 106 113 fp_exception_ieee_754_tl0: 107 PREEMPTIBLE_HANDLER fp_exception_ieee_754 114 mov TT_FP_EXCEPTION_IEEE_754, %g2 115 PREEMPTIBLE_HANDLER exc_dispatch 108 116 109 117 /* TT = 0x22, TL = 0, fb_exception_other handler */ … … 111 119 .global fb_exception_other_tl0 112 120 fp_exception_other_tl0: 113 PREEMPTIBLE_HANDLER fp_exception_other 121 mov TT_FP_EXCEPTION_OTHER, %g2 122 PREEMPTIBLE_HANDLER exc_dispatch 114 123 115 124 /* TT = 0x23, TL = 0, tag_overflow */ … … 117 126 .global tag_overflow_tl0 118 127 tag_overflow_tl0: 119 PREEMPTIBLE_HANDLER tag_overflow 128 mov TT_TAG_OVERFLOW, %g2 129 PREEMPTIBLE_HANDLER exc_dispatch 120 130 121 131 /* TT = 0x24, TL = 0, clean_window handler */ … … 129 139 .global division_by_zero_tl0 130 140 division_by_zero_tl0: 131 PREEMPTIBLE_HANDLER division_by_zero 141 mov TT_DIVISION_BY_ZERO, %g2 142 PREEMPTIBLE_HANDLER exc_dispatch 132 143 133 144 /* TT = 0x30, TL = 0, data_access_exception */ … … 136 147 data_access_exception_tl0: 137 148 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 138 PREEMPTIBLE_HANDLER data_access_exception 149 mov TT_DATA_ACCESS_EXCEPTION, %g2 150 PREEMPTIBLE_HANDLER exc_dispatch 139 151 140 152 /* TT = 0x32, TL = 0, data_access_error */ … … 142 154 .global data_access_error_tl0 143 155 data_access_error_tl0: 144 PREEMPTIBLE_HANDLER data_access_error 156 mov TT_DATA_ACCESS_ERROR, %g2 157 PREEMPTIBLE_HANDLER exc_dispatch 145 158 146 159 /* TT = 0x34, TL = 0, mem_address_not_aligned */ … … 148 161 .global mem_address_not_aligned_tl0 149 162 mem_address_not_aligned_tl0: 150 PREEMPTIBLE_HANDLER mem_address_not_aligned 163 mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2 164 PREEMPTIBLE_HANDLER exc_dispatch 151 165 152 166 /* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */ … … 154 168 .global LDDF_mem_address_not_aligned_tl0 155 169 LDDF_mem_address_not_aligned_tl0: 156 PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned 170 mov TT_LDDF_MEM_ADDRESS_NOT_ALIGNED, %g2 171 PREEMPTIBLE_HANDLER exc_dispatch 157 172 158 173 /* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */ … … 160 175 .global STDF_mem_address_not_aligned_tl0 161 176 STDF_mem_address_not_aligned_tl0: 162 PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned 177 mov TT_STDF_MEM_ADDRESS_NOT_ALIGNED, %g2 178 PREEMPTIBLE_HANDLER exc_dispatch 163 179 164 180 /* TT = 0x37, TL = 0, privileged_action */ … … 166 182 .global privileged_action_tl0 167 183 privileged_action_tl0: 168 PREEMPTIBLE_HANDLER privileged_action 184 mov TT_PRIVILEGED_ACTION, %g2 185 PREEMPTIBLE_HANDLER exc_dispatch 169 186 170 187 /* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */ … … 172 189 .global LDQF_mem_address_not_aligned_tl0 173 190 LDQF_mem_address_not_aligned_tl0: 174 PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned 191 mov TT_LDQF_MEM_ADDRESS_NOT_ALIGNED, %g2 192 PREEMPTIBLE_HANDLER exc_dispatch 175 193 176 194 /* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */ … … 178 196 .global STQF_mem_address_not_aligned_tl0 179 197 STQF_mem_address_not_aligned_tl0: 180 PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned 198 mov TT_STQF_MEM_ADDRESS_NOT_ALIGNED, %g2 199 PREEMPTIBLE_HANDLER exc_dispatch 181 200 182 201 /* TT = 0x41, TL = 0, interrupt_level_1 handler */ … … 184 203 .global interrupt_level_1_handler_tl0 185 204 interrupt_level_1_handler_tl0: 186 INTERRUPT_LEVEL_N_HANDLER 1 205 mov TT_INTERRUPT_LEVEL_1, %g2 206 PREEMPTIBLE_HANDLER exc_dispatch 187 207 188 208 /* TT = 0x42, TL = 0, interrupt_level_2 handler */ … … 190 210 .global interrupt_level_2_handler_tl0 191 211 interrupt_level_2_handler_tl0: 192 INTERRUPT_LEVEL_N_HANDLER 2 212 mov TT_INTERRUPT_LEVEL_2, %g2 213 PREEMPTIBLE_HANDLER exc_dispatch 193 214 194 215 /* TT = 0x43, TL = 0, interrupt_level_3 handler */ … … 196 217 .global interrupt_level_3_handler_tl0 197 218 interrupt_level_3_handler_tl0: 198 INTERRUPT_LEVEL_N_HANDLER 3 219 mov TT_INTERRUPT_LEVEL_3, %g2 220 PREEMPTIBLE_HANDLER exc_dispatch 199 221 200 222 /* TT = 0x44, TL = 0, interrupt_level_4 handler */ … … 202 224 .global interrupt_level_4_handler_tl0 203 225 interrupt_level_4_handler_tl0: 204 INTERRUPT_LEVEL_N_HANDLER 4 226 mov TT_INTERRUPT_LEVEL_4, %g2 227 PREEMPTIBLE_HANDLER exc_dispatch 205 228 206 229 /* TT = 0x45, TL = 0, interrupt_level_5 handler */ … … 208 231 .global interrupt_level_5_handler_tl0 209 232 interrupt_level_5_handler_tl0: 210 INTERRUPT_LEVEL_N_HANDLER 5 233 mov TT_INTERRUPT_LEVEL_5, %g2 234 PREEMPTIBLE_HANDLER exc_dispatch 211 235 212 236 /* TT = 0x46, TL = 0, interrupt_level_6 handler */ … … 214 238 .global interrupt_level_6_handler_tl0 215 239 interrupt_level_6_handler_tl0: 216 INTERRUPT_LEVEL_N_HANDLER 6 240 mov TT_INTERRUPT_LEVEL_6, %g2 241 PREEMPTIBLE_HANDLER exc_dispatch 217 242 218 243 /* TT = 0x47, TL = 0, interrupt_level_7 handler */ … … 220 245 .global interrupt_level_7_handler_tl0 221 246 interrupt_level_7_handler_tl0: 222 INTERRUPT_LEVEL_N_HANDLER 7 247 mov TT_INTERRUPT_LEVEL_7, %g2 248 PREEMPTIBLE_HANDLER exc_dispatch 223 249 224 250 /* TT = 0x48, TL = 0, interrupt_level_8 handler */ … … 226 252 .global interrupt_level_8_handler_tl0 227 253 interrupt_level_8_handler_tl0: 228 INTERRUPT_LEVEL_N_HANDLER 8 254 mov TT_INTERRUPT_LEVEL_8, %g2 255 PREEMPTIBLE_HANDLER exc_dispatch 229 256 230 257 /* TT = 0x49, TL = 0, interrupt_level_9 handler */ … … 232 259 .global interrupt_level_9_handler_tl0 233 260 interrupt_level_9_handler_tl0: 234 INTERRUPT_LEVEL_N_HANDLER 9 261 mov TT_INTERRUPT_LEVEL_9, %g2 262 PREEMPTIBLE_HANDLER exc_dispatch 235 263 236 264 /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ … … 238 266 .global interrupt_level_10_handler_tl0 239 267 interrupt_level_10_handler_tl0: 240 INTERRUPT_LEVEL_N_HANDLER 10 268 mov TT_INTERRUPT_LEVEL_10, %g2 269 PREEMPTIBLE_HANDLER exc_dispatch 241 270 242 271 /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ … … 244 273 .global interrupt_level_11_handler_tl0 245 274 interrupt_level_11_handler_tl0: 246 INTERRUPT_LEVEL_N_HANDLER 11 275 mov TT_INTERRUPT_LEVEL_11, %g2 276 PREEMPTIBLE_HANDLER exc_dispatch 247 277 248 278 /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ … … 250 280 .global interrupt_level_12_handler_tl0 251 281 interrupt_level_12_handler_tl0: 252 INTERRUPT_LEVEL_N_HANDLER 12 282 mov TT_INTERRUPT_LEVEL_12, %g2 283 PREEMPTIBLE_HANDLER exc_dispatch 253 284 254 285 /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ … … 256 287 .global interrupt_level_13_handler_tl0 257 288 interrupt_level_13_handler_tl0: 258 INTERRUPT_LEVEL_N_HANDLER 13 289 mov TT_INTERRUPT_LEVEL_13, %g2 290 PREEMPTIBLE_HANDLER exc_dispatch 259 291 260 292 /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ … … 262 294 .global interrupt_level_14_handler_tl0 263 295 interrupt_level_14_handler_tl0: 264 INTERRUPT_LEVEL_N_HANDLER 14 296 mov TT_INTERRUPT_LEVEL_14, %g2 297 PREEMPTIBLE_HANDLER exc_dispatch 265 298 266 299 /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ … … 268 301 .global interrupt_level_15_handler_tl0 269 302 interrupt_level_15_handler_tl0: 270 INTERRUPT_LEVEL_N_HANDLER 15 303 mov TT_INTERRUPT_LEVEL_15, %g2 304 PREEMPTIBLE_HANDLER exc_dispatch 271 305 272 306 /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ … … 274 308 .global interrupt_vector_trap_handler_tl0 275 309 interrupt_vector_trap_handler_tl0: 276 INTERRUPT_VECTOR_TRAP_HANDLER 310 mov TT_INTERRUPT_VECTOR_TRAP, %g2 311 PREEMPTIBLE_HANDLER exc_dispatch 277 312 278 313 /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ … … 356 391 wrpr %g0, 1, %tl 357 392 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 358 PREEMPTIBLE_HANDLER instruction_access_exception 393 mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2 394 PREEMPTIBLE_HANDLER exc_dispatch 359 395 360 396 /* TT = 0x0a, TL > 0, instruction_access_error */ … … 363 399 instruction_access_error_tl1: 364 400 wrpr %g0, 1, %tl 365 PREEMPTIBLE_HANDLER instruction_access_error 401 mov TT_INSTRUCTION_ACCESS_ERROR, %g2 402 PREEMPTIBLE_HANDLER exc_dispatch 366 403 367 404 /* TT = 0x10, TL > 0, illegal_instruction */ … … 370 407 illegal_instruction_tl1: 371 408 wrpr %g0, 1, %tl 372 PREEMPTIBLE_HANDLER illegal_instruction 409 mov TT_ILLEGAL_INSTRUCTION, %g2 410 PREEMPTIBLE_HANDLER exc_dispatch 373 411 374 412 /* TT = 0x24, TL > 0, clean_window handler */ … … 383 421 division_by_zero_tl1: 384 422 wrpr %g0, 1, %tl 385 PREEMPTIBLE_HANDLER division_by_zero 423 mov TT_DIVISION_BY_ZERO, %g2 424 PREEMPTIBLE_HANDLER exc_dispatch 386 425 387 426 /* TT = 0x30, TL > 0, data_access_exception */ … … 391 430 wrpr %g0, 1, %tl 392 431 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 393 PREEMPTIBLE_HANDLER data_access_exception 432 mov TT_DATA_ACCESS_EXCEPTION, %g2 433 PREEMPTIBLE_HANDLER exc_dispatch 394 434 395 435 /* TT = 0x32, TL > 0, data_access_error */ … … 398 438 data_access_error_tl1: 399 439 wrpr %g0, 1, %tl 400 PREEMPTIBLE_HANDLER data_access_error 440 mov TT_DATA_ACCESS_ERROR, %g2 441 PREEMPTIBLE_HANDLER exc_dispatch 401 442 402 443 /* TT = 0x34, TL > 0, mem_address_not_aligned */ … … 405 446 mem_address_not_aligned_tl1: 406 447 wrpr %g0, 1, %tl 407 PREEMPTIBLE_HANDLER mem_address_not_aligned 448 mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2 449 PREEMPTIBLE_HANDLER exc_dispatch 408 450 409 451 /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
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