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Changeset ec443d5 in mainline


Ignore:
Timestamp:
2014-10-20T20:38:13Z (7 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master
Children:
d70ebffe
Parents:
416ef49
Message:

Let most of the sparc64 traps go through exc_dispatch().

  • All interrupts (level and vector_trap) now use exc_dispatch().
  • Fast MMU traps still don't use it.
Location:
kernel/arch/sparc64
Files:
10 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/arch/interrupt.h

    r416ef49 rec443d5  
    4040#include <arch/istate.h>
    4141
    42 #define IVT_ITEMS  15
    43 #define IVT_FIRST  1
     42#define IVT_ITEMS  512
     43#define IVT_FIRST  0
    4444
    4545/* This needs to be defined for inter-architecture API portability. */
     
    5151};
    5252
     53extern void exc_arch_init(void);
     54
    5355#endif
    5456
  • kernel/arch/sparc64/include/arch/trap/exception.h

    r416ef49 rec443d5  
    7171extern void dump_istate(istate_t *istate);
    7272
    73 extern void instruction_access_exception(int n, istate_t *istate);
    74 extern void instruction_access_error(int n, istate_t *istate);
    75 extern void illegal_instruction(int n, istate_t *istate);
    76 extern void privileged_opcode(int n, istate_t *istate);
    77 extern void unimplemented_LDD(int n, istate_t *istate);
    78 extern void unimplemented_STD(int n, istate_t *istate);
    79 extern void fp_disabled(int n, istate_t *istate);
    80 extern void fp_exception_ieee_754(int n, istate_t *istate);
    81 extern void fp_exception_other(int n, istate_t *istate);
    82 extern void tag_overflow(int n, istate_t *istate);
    83 extern void division_by_zero(int n, istate_t *istate);
    84 extern void data_access_exception(int n, istate_t *istate);
    85 extern void data_access_error(int n, istate_t *istate);
    86 extern void mem_address_not_aligned(int n, istate_t *istate);
    87 extern void LDDF_mem_address_not_aligned(int n, istate_t *istate);
    88 extern void STDF_mem_address_not_aligned(int n, istate_t *istate);
    89 extern void privileged_action(int n, istate_t *istate);
    90 extern void LDQF_mem_address_not_aligned(int n, istate_t *istate);
    91 extern void STQF_mem_address_not_aligned(int n, istate_t *istate);
     73extern void instruction_access_exception(unsigned int, istate_t *);
     74extern void instruction_access_error(unsigned int, istate_t *);
     75extern void illegal_instruction(unsigned int, istate_t *);
     76extern void privileged_opcode(unsigned int, istate_t *);
     77extern void unimplemented_LDD(unsigned int, istate_t *);
     78extern void unimplemented_STD(unsigned int, istate_t *);
     79extern void fp_disabled(unsigned int, istate_t *);
     80extern void fp_exception_ieee_754(unsigned int, istate_t *);
     81extern void fp_exception_other(unsigned int, istate_t *);
     82extern void tag_overflow(unsigned int, istate_t *);
     83extern void division_by_zero(unsigned int, istate_t *);
     84extern void data_access_exception(unsigned int, istate_t *);
     85extern void data_access_error(unsigned int, istate_t *);
     86extern void mem_address_not_aligned(unsigned int, istate_t *);
     87extern void LDDF_mem_address_not_aligned(unsigned int, istate_t *);
     88extern void STDF_mem_address_not_aligned(unsigned int, istate_t *);
     89extern void privileged_action(unsigned int, istate_t *);
     90extern void LDQF_mem_address_not_aligned(unsigned int, istate_t *);
     91extern void STQF_mem_address_not_aligned(unsigned int, istate_t *);
    9292
    9393#endif /* !__ASM__ */
  • kernel/arch/sparc64/include/arch/trap/interrupt.h

    r416ef49 rec443d5  
    6363#define IGN_SHIFT       6
    6464
    65 
    66 #ifdef __ASM__
    67 .macro INTERRUPT_LEVEL_N_HANDLER n
    68         mov \n - 1, %g2
    69         PREEMPTIBLE_HANDLER exc_dispatch
    70 .endm
    71 #endif
    72 
    7365#ifndef __ASM__
    7466
    7567#include <arch/interrupt.h>
    7668
    77 extern void interrupt(int n, istate_t *istate);
     69extern void interrupt(unsigned int n, istate_t *istate);
     70
    7871#endif /* !def __ASM__ */
    7972
  • kernel/arch/sparc64/include/arch/trap/sun4u/interrupt.h

    r416ef49 rec443d5  
    9292#define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE      TRAP_TABLE_ENTRY_SIZE
    9393
    94 #ifdef __ASM__
    95 .macro INTERRUPT_VECTOR_TRAP_HANDLER
    96         PREEMPTIBLE_HANDLER interrupt
    97 .endm
    98 #endif /* __ASM__ */
    99 
    100 
    10194#endif
    10295
  • kernel/arch/sparc64/src/drivers/tick.c

    r416ef49 rec443d5  
    3535#include <arch/drivers/tick.h>
    3636#include <arch/interrupt.h>
     37#include <arch/trap/interrupt.h>
    3738#include <arch/sparc64.h>
    3839#include <arch/asm.h>
     
    5152        softint_reg_t clear;
    5253
    53         interrupt_register(14, "tick_int", tick_interrupt);
    5454        compare.int_dis = false;
    5555        compare.tick_cmpr = tick_counter_read() +
     
    7979/** Process tick interrupt.
    8080 *
    81  * @param n      Interrupt Level (14, can be ignored)
     81 * @param n      Trap type (0x4e, can be ignored)
    8282 * @param istate Interrupted state.
    8383 *
     
    9393         * Make sure we are servicing interrupt_level_14
    9494         */
    95         ASSERT(n == 14);
     95        ASSERT(n == TT_INTERRUPT_LEVEL_14);
    9696       
    9797        /*
  • kernel/arch/sparc64/src/sun4u/sparc64.c

    r416ef49 rec443d5  
    8686void arch_pre_mm_init(void)
    8787{
    88         if (config.cpu_active == 1)
     88        if (config.cpu_active == 1) {
    8989                trap_init();
     90                exc_arch_init();
     91        }
    9092}
    9193
  • kernel/arch/sparc64/src/trap/exception.c

    r416ef49 rec443d5  
    5555
    5656/** Handle instruction_access_exception. (0x8) */
    57 void instruction_access_exception(int n, istate_t *istate)
     57void instruction_access_exception(unsigned int n, istate_t *istate)
    5858{
    5959        fault_if_from_uspace(istate, "%s.", __func__);
     
    6262
    6363/** Handle instruction_access_error. (0xa) */
    64 void instruction_access_error(int n, istate_t *istate)
     64void instruction_access_error(unsigned int n, istate_t *istate)
    6565{
    6666        fault_if_from_uspace(istate, "%s.", __func__);
     
    6969
    7070/** Handle illegal_instruction. (0x10) */
    71 void illegal_instruction(int n, istate_t *istate)
     71void illegal_instruction(unsigned int n, istate_t *istate)
    7272{
    7373        fault_if_from_uspace(istate, "%s.", __func__);
     
    7676
    7777/** Handle privileged_opcode. (0x11) */
    78 void privileged_opcode(int n, istate_t *istate)
     78void privileged_opcode(unsigned int n, istate_t *istate)
    7979{
    8080        fault_if_from_uspace(istate, "%s.", __func__);
     
    8383
    8484/** Handle unimplemented_LDD. (0x12) */
    85 void unimplemented_LDD(int n, istate_t *istate)
     85void unimplemented_LDD(unsigned int n, istate_t *istate)
    8686{
    8787        fault_if_from_uspace(istate, "%s.", __func__);
     
    9090
    9191/** Handle unimplemented_STD. (0x13) */
    92 void unimplemented_STD(int n, istate_t *istate)
     92void unimplemented_STD(unsigned int n, istate_t *istate)
    9393{
    9494        fault_if_from_uspace(istate, "%s.", __func__);
     
    9797
    9898/** Handle fp_disabled. (0x20) */
    99 void fp_disabled(int n, istate_t *istate)
     99void fp_disabled(unsigned int n, istate_t *istate)
    100100{
    101101        fprs_reg_t fprs;
     
    117117
    118118/** Handle fp_exception_ieee_754. (0x21) */
    119 void fp_exception_ieee_754(int n, istate_t *istate)
     119void fp_exception_ieee_754(unsigned int n, istate_t *istate)
    120120{
    121121        fault_if_from_uspace(istate, "%s.", __func__);
     
    124124
    125125/** Handle fp_exception_other. (0x22) */
    126 void fp_exception_other(int n, istate_t *istate)
     126void fp_exception_other(unsigned int n, istate_t *istate)
    127127{
    128128        fault_if_from_uspace(istate, "%s.", __func__);
     
    131131
    132132/** Handle tag_overflow. (0x23) */
    133 void tag_overflow(int n, istate_t *istate)
     133void tag_overflow(unsigned int n, istate_t *istate)
    134134{
    135135        fault_if_from_uspace(istate, "%s.", __func__);
     
    138138
    139139/** Handle division_by_zero. (0x28) */
    140 void division_by_zero(int n, istate_t *istate)
     140void division_by_zero(unsigned int n, istate_t *istate)
    141141{
    142142        fault_if_from_uspace(istate, "%s.", __func__);
     
    145145
    146146/** Handle data_access_exception. (0x30) */
    147 void data_access_exception(int n, istate_t *istate)
     147void data_access_exception(unsigned int n, istate_t *istate)
    148148{
    149149        fault_if_from_uspace(istate, "%s.", __func__);
     
    152152
    153153/** Handle data_access_error. (0x32) */
    154 void data_access_error(int n, istate_t *istate)
     154void data_access_error(unsigned int n, istate_t *istate)
    155155{
    156156        fault_if_from_uspace(istate, "%s.", __func__);
     
    159159
    160160/** Handle mem_address_not_aligned. (0x34) */
    161 void mem_address_not_aligned(int n, istate_t *istate)
     161void mem_address_not_aligned(unsigned int n, istate_t *istate)
    162162{
    163163        fault_if_from_uspace(istate, "%s.", __func__);
     
    166166
    167167/** Handle LDDF_mem_address_not_aligned. (0x35) */
    168 void LDDF_mem_address_not_aligned(int n, istate_t *istate)
     168void LDDF_mem_address_not_aligned(unsigned int n, istate_t *istate)
    169169{
    170170        fault_if_from_uspace(istate, "%s.", __func__);
     
    173173
    174174/** Handle STDF_mem_address_not_aligned. (0x36) */
    175 void STDF_mem_address_not_aligned(int n, istate_t *istate)
     175void STDF_mem_address_not_aligned(unsigned int n, istate_t *istate)
    176176{
    177177        fault_if_from_uspace(istate, "%s.", __func__);
     
    180180
    181181/** Handle privileged_action. (0x37) */
    182 void privileged_action(int n, istate_t *istate)
     182void privileged_action(unsigned int n, istate_t *istate)
    183183{
    184184        fault_if_from_uspace(istate, "%s.", __func__);
     
    187187
    188188/** Handle LDQF_mem_address_not_aligned. (0x38) */
    189 void LDQF_mem_address_not_aligned(int n, istate_t *istate)
     189void LDQF_mem_address_not_aligned(unsigned int n, istate_t *istate)
    190190{
    191191        fault_if_from_uspace(istate, "%s.", __func__);
     
    194194
    195195/** Handle STQF_mem_address_not_aligned. (0x39) */
    196 void STQF_mem_address_not_aligned(int n, istate_t *istate)
     196void STQF_mem_address_not_aligned(unsigned int n, istate_t *istate)
    197197{
    198198        fault_if_from_uspace(istate, "%s.", __func__);
  • kernel/arch/sparc64/src/trap/interrupt.c

    r416ef49 rec443d5  
    3636#include <arch/interrupt.h>
    3737#include <arch/trap/interrupt.h>
     38#include <arch/trap/exception.h>
    3839#include <arch/sparc64.h>
    3940#include <interrupt.h>
     
    4344#include <arch/asm.h>
    4445#include <arch/barrier.h>
     46#include <arch/drivers/tick.h>
    4547#include <print.h>
    4648#include <arch.h>
     
    4951#include <synch/spinlock.h>
    5052
    51 /** Register Interrupt Level Handler.
    52  *
    53  * @param n       Interrupt Level (1 - 15).
    54  * @param name    Short descriptive string.
    55  * @param handler Handler.
    56  *
    57  */
    58 void interrupt_register(unsigned int n, const char *name, iroutine_t handler)
     53void exc_arch_init(void)
    5954{
    60         ASSERT(n >= IVT_FIRST);
    61         ASSERT(n <= IVT_ITEMS);
     55        exc_register(TT_INSTRUCTION_ACCESS_EXCEPTION,
     56            "instruction_access_exception", false,
     57            instruction_access_exception);
     58        exc_register(TT_INSTRUCTION_ACCESS_ERROR,
     59            "instruction_access_error", false,
     60            instruction_access_error);
     61        exc_register(TT_ILLEGAL_INSTRUCTION,
     62            "illegal_instruction", false,
     63            illegal_instruction);
     64        exc_register(TT_PRIVILEGED_OPCODE,
     65            "privileged_opcode", false,
     66            privileged_opcode);
     67        exc_register(TT_UNIMPLEMENTED_LDD,
     68            "unimplemented_LDD", false,
     69            unimplemented_LDD);
     70        exc_register(TT_UNIMPLEMENTED_STD,
     71            "unimplemented_STD", false,
     72            unimplemented_STD);
     73        exc_register(TT_FP_DISABLED,
     74            "fp_disabled", true,
     75            fp_disabled);
     76        exc_register(TT_FP_EXCEPTION_IEEE_754,
     77            "fp_exception_ieee_754", false,
     78            fp_exception_ieee_754);
     79        exc_register(TT_FP_EXCEPTION_OTHER,
     80            "fp_exception_other", false,
     81            fp_exception_other);
     82        exc_register(TT_TAG_OVERFLOW,
     83            "tag_overflow", false,
     84            tag_overflow);     
     85        exc_register(TT_DIVISION_BY_ZERO,
     86            "division_by_zero", false,
     87            division_by_zero);
     88        exc_register(TT_DATA_ACCESS_EXCEPTION,
     89            "data_access_exception", false,
     90            data_access_exception);
     91        exc_register(TT_DATA_ACCESS_ERROR,
     92            "data_access_error", false,
     93            data_access_error);
     94        exc_register(TT_MEM_ADDRESS_NOT_ALIGNED,
     95            "mem_address_not_aligned", false,
     96            mem_address_not_aligned);
     97        exc_register(TT_LDDF_MEM_ADDRESS_NOT_ALIGNED,
     98            "LDDF_mem_address_not_aligned", false,
     99            LDDF_mem_address_not_aligned);
     100        exc_register(TT_STDF_MEM_ADDRESS_NOT_ALIGNED,
     101            "STDF_mem_address_not_aligned", false,
     102            STDF_mem_address_not_aligned);
     103        exc_register(TT_PRIVILEGED_ACTION,
     104            "privileged_action", false,
     105            privileged_action);
     106        exc_register(TT_LDQF_MEM_ADDRESS_NOT_ALIGNED,
     107            "LDQF_mem_address_not_aligned", false,
     108            LDQF_mem_address_not_aligned);
     109        exc_register(TT_STQF_MEM_ADDRESS_NOT_ALIGNED,
     110            "STQF_mem_address_not_aligned", false,
     111            STQF_mem_address_not_aligned);
     112
     113        exc_register(TT_INTERRUPT_LEVEL_14,
     114            "interrupt_level_14", true,
     115            tick_interrupt);
     116
     117#ifdef SUN4u
     118        exc_register(TT_INTERRUPT_VECTOR_TRAP,
     119            "interrupt_vector_trap", true,
     120            interrupt);
     121#endif
    62122       
    63         exc_register(n - IVT_FIRST, name, true, handler);
    64123}
    65124
  • kernel/arch/sparc64/src/trap/sun4u/interrupt.c

    r416ef49 rec443d5  
    5353 * @param istate Ignored.
    5454 */
    55 void interrupt(int n, istate_t *istate)
     55void interrupt(unsigned int n, istate_t *istate)
    5656{
    5757        uint64_t status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
  • kernel/arch/sparc64/src/trap/sun4u/trap_table.S

    r416ef49 rec443d5  
    6363instruction_access_exception_tl0:
    6464        wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
    65         PREEMPTIBLE_HANDLER instruction_access_exception
     65        mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2
     66        PREEMPTIBLE_HANDLER exc_dispatch
    6667
    6768/* TT = 0x0a, TL = 0, instruction_access_error */
     
    6970.global instruction_access_error_tl0
    7071instruction_access_error_tl0:
    71         PREEMPTIBLE_HANDLER instruction_access_error
     72        mov TT_INSTRUCTION_ACCESS_ERROR, %g2
     73        PREEMPTIBLE_HANDLER exc_dispatch
    7274
    7375/* TT = 0x10, TL = 0, illegal_instruction */
     
    7577.global illegal_instruction_tl0
    7678illegal_instruction_tl0:
    77         PREEMPTIBLE_HANDLER illegal_instruction
     79        mov TT_ILLEGAL_INSTRUCTION, %g2
     80        PREEMPTIBLE_HANDLER exc_dispatch
    7881
    7982/* TT = 0x11, TL = 0, privileged_opcode */
     
    8184.global privileged_opcode_tl0
    8285privileged_opcode_tl0:
    83         PREEMPTIBLE_HANDLER privileged_opcode
     86        mov TT_PRIVILEGED_OPCODE, %g2
     87        PREEMPTIBLE_HANDLER exc_dispatch
    8488
    8589/* TT = 0x12, TL = 0, unimplemented_LDD */
     
    8791.global unimplemented_LDD_tl0
    8892unimplemented_LDD_tl0:
    89         PREEMPTIBLE_HANDLER unimplemented_LDD
     93        mov TT_UNIMPLEMENTED_LDD, %g2
     94        PREEMPTIBLE_HANDLER exc_dispatch
    9095
    9196/* TT = 0x13, TL = 0, unimplemented_STD */
     
    9398.global unimplemented_STD_tl0
    9499unimplemented_STD_tl0:
    95         PREEMPTIBLE_HANDLER unimplemented_STD
     100        mov TT_UNIMPLEMENTED_STD, %g2
     101        PREEMPTIBLE_HANDLER exc_dispatch
    96102
    97103/* TT = 0x20, TL = 0, fb_disabled handler */
     
    99105.global fb_disabled_tl0
    100106fp_disabled_tl0:
    101         PREEMPTIBLE_HANDLER fp_disabled
     107        mov TT_FP_DISABLED, %g2
     108        PREEMPTIBLE_HANDLER exc_dispatch
    102109
    103110/* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */
     
    105112.global fb_exception_ieee_754_tl0
    106113fp_exception_ieee_754_tl0:
    107         PREEMPTIBLE_HANDLER fp_exception_ieee_754
     114        mov TT_FP_EXCEPTION_IEEE_754, %g2
     115        PREEMPTIBLE_HANDLER exc_dispatch
    108116
    109117/* TT = 0x22, TL = 0, fb_exception_other handler */
     
    111119.global fb_exception_other_tl0
    112120fp_exception_other_tl0:
    113         PREEMPTIBLE_HANDLER fp_exception_other
     121        mov TT_FP_EXCEPTION_OTHER, %g2
     122        PREEMPTIBLE_HANDLER exc_dispatch
    114123
    115124/* TT = 0x23, TL = 0, tag_overflow */
     
    117126.global tag_overflow_tl0
    118127tag_overflow_tl0:
    119         PREEMPTIBLE_HANDLER tag_overflow
     128        mov TT_TAG_OVERFLOW, %g2
     129        PREEMPTIBLE_HANDLER exc_dispatch
    120130
    121131/* TT = 0x24, TL = 0, clean_window handler */
     
    129139.global division_by_zero_tl0
    130140division_by_zero_tl0:
    131         PREEMPTIBLE_HANDLER division_by_zero
     141        mov TT_DIVISION_BY_ZERO, %g2
     142        PREEMPTIBLE_HANDLER exc_dispatch
    132143
    133144/* TT = 0x30, TL = 0, data_access_exception */
     
    136147data_access_exception_tl0:
    137148        wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
    138         PREEMPTIBLE_HANDLER data_access_exception
     149        mov TT_DATA_ACCESS_EXCEPTION, %g2
     150        PREEMPTIBLE_HANDLER exc_dispatch
    139151
    140152/* TT = 0x32, TL = 0, data_access_error */
     
    142154.global data_access_error_tl0
    143155data_access_error_tl0:
    144         PREEMPTIBLE_HANDLER data_access_error
     156        mov TT_DATA_ACCESS_ERROR, %g2
     157        PREEMPTIBLE_HANDLER exc_dispatch
    145158
    146159/* TT = 0x34, TL = 0, mem_address_not_aligned */
     
    148161.global mem_address_not_aligned_tl0
    149162mem_address_not_aligned_tl0:
    150         PREEMPTIBLE_HANDLER mem_address_not_aligned
     163        mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2
     164        PREEMPTIBLE_HANDLER exc_dispatch
    151165
    152166/* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */
     
    154168.global LDDF_mem_address_not_aligned_tl0
    155169LDDF_mem_address_not_aligned_tl0:
    156         PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned
     170        mov TT_LDDF_MEM_ADDRESS_NOT_ALIGNED, %g2
     171        PREEMPTIBLE_HANDLER exc_dispatch
    157172
    158173/* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */
     
    160175.global STDF_mem_address_not_aligned_tl0
    161176STDF_mem_address_not_aligned_tl0:
    162         PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned
     177        mov TT_STDF_MEM_ADDRESS_NOT_ALIGNED, %g2
     178        PREEMPTIBLE_HANDLER exc_dispatch
    163179
    164180/* TT = 0x37, TL = 0, privileged_action */
     
    166182.global privileged_action_tl0
    167183privileged_action_tl0:
    168         PREEMPTIBLE_HANDLER privileged_action
     184        mov TT_PRIVILEGED_ACTION, %g2
     185        PREEMPTIBLE_HANDLER exc_dispatch
    169186
    170187/* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */
     
    172189.global LDQF_mem_address_not_aligned_tl0
    173190LDQF_mem_address_not_aligned_tl0:
    174         PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned
     191        mov TT_LDQF_MEM_ADDRESS_NOT_ALIGNED, %g2
     192        PREEMPTIBLE_HANDLER exc_dispatch
    175193
    176194/* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */
     
    178196.global STQF_mem_address_not_aligned_tl0
    179197STQF_mem_address_not_aligned_tl0:
    180         PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned
     198        mov TT_STQF_MEM_ADDRESS_NOT_ALIGNED, %g2
     199        PREEMPTIBLE_HANDLER exc_dispatch
    181200
    182201/* TT = 0x41, TL = 0, interrupt_level_1 handler */
     
    184203.global interrupt_level_1_handler_tl0
    185204interrupt_level_1_handler_tl0:
    186         INTERRUPT_LEVEL_N_HANDLER 1
     205        mov TT_INTERRUPT_LEVEL_1, %g2
     206        PREEMPTIBLE_HANDLER exc_dispatch
    187207
    188208/* TT = 0x42, TL = 0, interrupt_level_2 handler */
     
    190210.global interrupt_level_2_handler_tl0
    191211interrupt_level_2_handler_tl0:
    192         INTERRUPT_LEVEL_N_HANDLER 2
     212        mov TT_INTERRUPT_LEVEL_2, %g2
     213        PREEMPTIBLE_HANDLER exc_dispatch
    193214
    194215/* TT = 0x43, TL = 0, interrupt_level_3 handler */
     
    196217.global interrupt_level_3_handler_tl0
    197218interrupt_level_3_handler_tl0:
    198         INTERRUPT_LEVEL_N_HANDLER 3
     219        mov TT_INTERRUPT_LEVEL_3, %g2
     220        PREEMPTIBLE_HANDLER exc_dispatch
    199221
    200222/* TT = 0x44, TL = 0, interrupt_level_4 handler */
     
    202224.global interrupt_level_4_handler_tl0
    203225interrupt_level_4_handler_tl0:
    204         INTERRUPT_LEVEL_N_HANDLER 4
     226        mov TT_INTERRUPT_LEVEL_4, %g2
     227        PREEMPTIBLE_HANDLER exc_dispatch
    205228
    206229/* TT = 0x45, TL = 0, interrupt_level_5 handler */
     
    208231.global interrupt_level_5_handler_tl0
    209232interrupt_level_5_handler_tl0:
    210         INTERRUPT_LEVEL_N_HANDLER 5
     233        mov TT_INTERRUPT_LEVEL_5, %g2
     234        PREEMPTIBLE_HANDLER exc_dispatch
    211235
    212236/* TT = 0x46, TL = 0, interrupt_level_6 handler */
     
    214238.global interrupt_level_6_handler_tl0
    215239interrupt_level_6_handler_tl0:
    216         INTERRUPT_LEVEL_N_HANDLER 6
     240        mov TT_INTERRUPT_LEVEL_6, %g2
     241        PREEMPTIBLE_HANDLER exc_dispatch
    217242
    218243/* TT = 0x47, TL = 0, interrupt_level_7 handler */
     
    220245.global interrupt_level_7_handler_tl0
    221246interrupt_level_7_handler_tl0:
    222         INTERRUPT_LEVEL_N_HANDLER 7
     247        mov TT_INTERRUPT_LEVEL_7, %g2
     248        PREEMPTIBLE_HANDLER exc_dispatch
    223249
    224250/* TT = 0x48, TL = 0, interrupt_level_8 handler */
     
    226252.global interrupt_level_8_handler_tl0
    227253interrupt_level_8_handler_tl0:
    228         INTERRUPT_LEVEL_N_HANDLER 8
     254        mov TT_INTERRUPT_LEVEL_8, %g2
     255        PREEMPTIBLE_HANDLER exc_dispatch
    229256
    230257/* TT = 0x49, TL = 0, interrupt_level_9 handler */
     
    232259.global interrupt_level_9_handler_tl0
    233260interrupt_level_9_handler_tl0:
    234         INTERRUPT_LEVEL_N_HANDLER 9
     261        mov TT_INTERRUPT_LEVEL_9, %g2
     262        PREEMPTIBLE_HANDLER exc_dispatch
    235263
    236264/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
     
    238266.global interrupt_level_10_handler_tl0
    239267interrupt_level_10_handler_tl0:
    240         INTERRUPT_LEVEL_N_HANDLER 10
     268        mov TT_INTERRUPT_LEVEL_10, %g2
     269        PREEMPTIBLE_HANDLER exc_dispatch
    241270
    242271/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
     
    244273.global interrupt_level_11_handler_tl0
    245274interrupt_level_11_handler_tl0:
    246         INTERRUPT_LEVEL_N_HANDLER 11
     275        mov TT_INTERRUPT_LEVEL_11, %g2
     276        PREEMPTIBLE_HANDLER exc_dispatch
    247277
    248278/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
     
    250280.global interrupt_level_12_handler_tl0
    251281interrupt_level_12_handler_tl0:
    252         INTERRUPT_LEVEL_N_HANDLER 12
     282        mov TT_INTERRUPT_LEVEL_12, %g2
     283        PREEMPTIBLE_HANDLER exc_dispatch
    253284
    254285/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
     
    256287.global interrupt_level_13_handler_tl0
    257288interrupt_level_13_handler_tl0:
    258         INTERRUPT_LEVEL_N_HANDLER 13
     289        mov TT_INTERRUPT_LEVEL_13, %g2
     290        PREEMPTIBLE_HANDLER exc_dispatch
    259291
    260292/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
     
    262294.global interrupt_level_14_handler_tl0
    263295interrupt_level_14_handler_tl0:
    264         INTERRUPT_LEVEL_N_HANDLER 14
     296        mov TT_INTERRUPT_LEVEL_14, %g2
     297        PREEMPTIBLE_HANDLER exc_dispatch
    265298
    266299/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
     
    268301.global interrupt_level_15_handler_tl0
    269302interrupt_level_15_handler_tl0:
    270         INTERRUPT_LEVEL_N_HANDLER 15
     303        mov TT_INTERRUPT_LEVEL_15, %g2
     304        PREEMPTIBLE_HANDLER exc_dispatch
    271305
    272306/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
     
    274308.global interrupt_vector_trap_handler_tl0
    275309interrupt_vector_trap_handler_tl0:
    276         INTERRUPT_VECTOR_TRAP_HANDLER
     310        mov TT_INTERRUPT_VECTOR_TRAP, %g2
     311        PREEMPTIBLE_HANDLER exc_dispatch
    277312
    278313/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
     
    356391        wrpr %g0, 1, %tl
    357392        wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
    358         PREEMPTIBLE_HANDLER instruction_access_exception
     393        mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2
     394        PREEMPTIBLE_HANDLER exc_dispatch
    359395
    360396/* TT = 0x0a, TL > 0, instruction_access_error */
     
    363399instruction_access_error_tl1:
    364400        wrpr %g0, 1, %tl
    365         PREEMPTIBLE_HANDLER instruction_access_error
     401        mov TT_INSTRUCTION_ACCESS_ERROR, %g2
     402        PREEMPTIBLE_HANDLER exc_dispatch
    366403
    367404/* TT = 0x10, TL > 0, illegal_instruction */
     
    370407illegal_instruction_tl1:
    371408        wrpr %g0, 1, %tl
    372         PREEMPTIBLE_HANDLER illegal_instruction
     409        mov TT_ILLEGAL_INSTRUCTION, %g2
     410        PREEMPTIBLE_HANDLER exc_dispatch
    373411
    374412/* TT = 0x24, TL > 0, clean_window handler */
     
    383421division_by_zero_tl1:
    384422        wrpr %g0, 1, %tl
    385         PREEMPTIBLE_HANDLER division_by_zero
     423        mov TT_DIVISION_BY_ZERO, %g2
     424        PREEMPTIBLE_HANDLER exc_dispatch
    386425
    387426/* TT = 0x30, TL > 0, data_access_exception */
     
    391430        wrpr %g0, 1, %tl
    392431        wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
    393         PREEMPTIBLE_HANDLER data_access_exception
     432        mov TT_DATA_ACCESS_EXCEPTION, %g2
     433        PREEMPTIBLE_HANDLER exc_dispatch
    394434
    395435/* TT = 0x32, TL > 0, data_access_error */
     
    398438data_access_error_tl1:
    399439        wrpr %g0, 1, %tl
    400         PREEMPTIBLE_HANDLER data_access_error
     440        mov TT_DATA_ACCESS_ERROR, %g2
     441        PREEMPTIBLE_HANDLER exc_dispatch
    401442
    402443/* TT = 0x34, TL > 0, mem_address_not_aligned */
     
    405446mem_address_not_aligned_tl1:
    406447        wrpr %g0, 1, %tl
    407         PREEMPTIBLE_HANDLER mem_address_not_aligned
     448        mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2
     449        PREEMPTIBLE_HANDLER exc_dispatch
    408450
    409451/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
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