Changeset a35b458 in mainline for kernel/arch/ia32/src

Timestamp:

2018-03-02T20:10:49Z (7 years ago)

Author:

Jiří Zárevúcky <zarevucky.jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f1380b7

Parents:

3061bc1

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)

git-committer:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)

Message:

style: Remove trailing whitespace on _all_ lines, including empty ones, for particular file types.

Command used: tools/srepl '\s\+$' '' -- *.c *.h *.py *.sh *.s *.S *.ag

Currently, whitespace on empty lines is very inconsistent.
There are two basic choices: Either remove the whitespace, or keep empty lines
indented to the level of surrounding code. The former is AFAICT more common,
and also much easier to do automatically.

Alternatively, we could write script for automatic indentation, and use that
instead. However, if such a script exists, it's possible to use the indented
style locally, by having the editor apply relevant conversions on load/save,
without affecting remote repository. IMO, it makes more sense to adopt
the simpler rule.

Location:

kernel/arch/ia32/src

Files:

• asm.S (modified) (21 diffs)
• atomic.S (modified) (2 diffs)
• boot/multiboot.S (modified) (21 diffs)
• boot/multiboot2.S (modified) (10 diffs)
• cpu/cpu.c (modified) (4 diffs)
• ddi/ddi.c (modified) (5 diffs)
• drivers/i8254.c (modified) (4 diffs)
• fpu_context.c (modified) (2 diffs)
• ia32.c (modified) (5 diffs)
• interrupt.c (modified) (9 diffs)
• mm/frame.c (modified) (8 diffs)
• mm/page.c (modified) (4 diffs)
• pm.c (modified) (3 diffs)
• proc/scheduler.c (modified) (2 diffs)
• smp/ap.S (modified) (3 diffs)
• smp/apic.c (modified) (33 diffs)
• smp/mps.c (modified) (27 diffs)
• smp/smp.c (modified) (11 diffs)
• userspace.c (modified) (3 diffs)

kernel/arch/ia32/src/asm.S

@@ -63 +63 @@
         movl %edi, %edx  /* save %edi */
         movl %esi, %eax  /* save %esi */
-        
+
         movl MEMCPY_SIZE(%esp), %ecx
         shrl $2, %ecx  /* size / 4 */
-        
+
         movl MEMCPY_DST(%esp), %edi
         movl MEMCPY_SRC(%esp), %esi
-        
+
         /* Copy whole words */
         rep movsl
-        
+
         movl MEMCPY_SIZE(%esp), %ecx
         andl $3, %ecx  /* size % 4 */
         jz 0f
-        
+
         /* Copy the rest byte by byte */
         rep movsb
-        
+
         0:
-        
+
                 movl %edx, %edi
                 movl %eax, %esi
-                
+
                 /* MEMCPY_DST(%esp), success */
                 movl MEMCPY_DST(%esp), %eax
@@ -99 +99 @@
         movl %edx, %edi
         movl %eax, %esi
-        
+
         /* Return 0, failure */
         xorl %eax, %eax
@@ -112 +112 @@
         movl %cr0, %edx
         orl $CR0_PG, %edx  /* paging on */
-        
+
         /* Clear Cache Disable and not Write Though */
         andl $~(CR0_CD | CR0_NW), %edx
         movl %edx, %cr0
         jmp 0f
-        
+
         0:
                 ret
@@ -174 +174 @@
         movl %edi, ISTATE_OFFSET_EDI(%esp)      /* observability; not needed */
         movl %ebp, ISTATE_OFFSET_EBP(%esp)      /* observability; not needed */
-        
+
         /*
          * Fake up the stack trace linkage.
@@ -190 +190 @@
         movl $(GDT_SELECTOR(VREG_DES)), %eax
         movl %eax, %gs
-        
+
         /*
          * Sanitize EFLAGS.
@@ -207 +207 @@
 
         call syscall_handler
-        
+
         /*
          * Prepare return address and userspace stack for SYSEXIT.
@@ -252 +252 @@
         movl %es, %ecx
         movl %ds, %edx
-                
+
         movl %ecx, ISTATE_OFFSET_ES(%esp)
         movl %edx, ISTATE_OFFSET_DS(%esp)
@@ -264 +264 @@
         movl $(GDT_SELECTOR(VREG_DES)), %eax
         movl %eax, %gs
-                
+
         movl $0, ISTATE_OFFSET_EBP_FRAME(%esp)
         movl ISTATE_OFFSET_EIP(%esp), %eax
         movl %eax, ISTATE_OFFSET_EIP_FRAME(%esp)
         leal ISTATE_OFFSET_EBP_FRAME(%esp), %ebp
-                
+
         cld
-                
+
         /* Call syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax) */
         call syscall_handler
-                        
+
         /*
          * Restore the segment registers.
@@ -286 +286 @@
         movl ISTATE_OFFSET_ES(%esp), %ecx
         movl ISTATE_OFFSET_DS(%esp), %edx
-                        
+
         movl %ecx, %es
         movl %edx, %ds
-                        
+
         /*
          * Restore the preserved registers the handler cloberred itself
@@ -295 +295 @@
          */
         movl ISTATE_OFFSET_EBP(%esp), %ebp
-                        
+
         addl $(ISTATE_SOFT_SIZE + 4), %esp
         iret
-                
+
 /**
  * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int
@@ -333 +333 @@
                 subl $(ISTATE_SOFT_SIZE + 4), %esp
         .endif
-        
+
         /*
          * Save the general purpose registers.
@@ -344 +344 @@
         movl %esi, ISTATE_OFFSET_ESI(%esp)
         movl %ebp, ISTATE_OFFSET_EBP(%esp)
-        
+
         /*
          * Save the segment registers.
@@ -356 +356 @@
         movl %es, %ecx
         movl %ds, %edx
-        
+
         movl %ecx, ISTATE_OFFSET_ES(%esp)
         movl %edx, ISTATE_OFFSET_DS(%esp)
-        
+
         /*
          * Switch to kernel selectors.
@@ -368 +368 @@
         movl $(GDT_SELECTOR(VREG_DES)), %eax
         movl %eax, %gs
-        
+
         /*
          * Imitate a regular stack frame linkage.
@@ -387 +387 @@
         movl %eax, ISTATE_OFFSET_EIP_FRAME(%esp)
         leal ISTATE_OFFSET_EBP_FRAME(%esp), %ebp
-                
+
         cld
-                
+
         pushl %esp   /* pass istate address */
         pushl $(\i)  /* pass intnum */
-                
+
         /* Call exc_dispatch(intnum, istate) */
         call exc_dispatch
-                
+
         addl $8, %esp  /* clear arguments from the stack */
-                
+
         /*
          * Restore the selector registers.
@@ -409 +409 @@
         movl ISTATE_OFFSET_ES(%esp), %ecx
         movl ISTATE_OFFSET_DS(%esp), %edx
-                
+
         movl %ecx, %es
         movl %edx, %ds
-                
+
         /*
          * Restore the scratch registers and the preserved
@@ -422 +422 @@
         movl ISTATE_OFFSET_EDX(%esp), %edx
         movl ISTATE_OFFSET_EBP(%esp), %ebp
-                
+
         addl $(ISTATE_SOFT_SIZE + 4), %esp
         iret
@@ -452 +452 @@
  */
 FUNCTION_BEGIN(early_putchar)
-        
+
 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
-        
+
         /* Prologue, save preserved registers */
         pushl %ebp
@@ -461 +461 @@
         pushl %esi
         pushl %edi
-        
+
         movl $(PA2KA(0xb8000)), %edi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb early_putchar_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         early_putchar_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %eax
         addl %eax, %edi
-        
+
         movl 0x08(%ebp), %eax
-        
+
         cmp $0x0a, %al
         jne early_putchar_backspace
-        
+
                 /* Interpret newline */
-                
+
                 movw %bx, %ax  /* %bx -> %dx:%ax */
                 xorw %dx, %dx
-                
+
                 movw $80, %cx
                 idivw %cx, %ax  /* %dx = %bx % 80 */
-                
+
                 /* %bx <- %bx + 80 - (%bx % 80) */
                 addw %cx, %bx
                 subw %dx, %bx
-                
+
                 jmp early_putchar_skip
-        
+
         early_putchar_backspace:
-        
+
                 cmp $0x08, %al
                 jne early_putchar_print
-                
+
                 /* Interpret backspace */
-                
+
                 cmp $0x0000, %bx
                 je early_putchar_skip
-                
+
                 dec %bx
                 jmp early_putchar_skip
-        
+
         early_putchar_print:
-        
+
                 /* Print character */
-                
+
                 movb $0x0e, %ah  /* black background, yellow foreground */
                 stosw
                 inc %bx
-        
+
         early_putchar_skip:
-        
+
         /* Sanity check for the cursor on the last line */
         cmp $2000, %bx
         jb early_putchar_no_scroll
-        
+
                 /* Scroll the screen (24 rows) */
                 movl $(PA2KA(0xb80a0)), %esi
@@ -545 +545 @@
                 movl $960, %ecx
                 rep movsl
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $40, %ecx
                 rep stosl
-                
+
                 /* Go to row 24 */
                 movw $1920, %bx
-        
+
         early_putchar_no_scroll:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         /* Epilogue, restore preserved registers */
         popl %edi
@@ -579 +579 @@
         popl %ebx
         leave
-        
+
 #endif
-        
+
         ret
 FUNCTION_END(early_putchar)

kernel/arch/ia32/src/atomic.S

@@ -39 +39 @@
         pushl %eax
         pushl %ebx
-        
+
         movl 12(%esp),%ebx
 
@@ -56 +56 @@
         ret
 FUNCTION_END(spinlock_arch)
-        
+
 #endif

kernel/arch/ia32/src/boot/multiboot.S

@@ -77 +77 @@
         cli
         cld
-        
+
         /* Initialize stack pointer */
         movl $START_STACK, %esp
-        
+
         /*
          * Initialize Global Descriptor Table and
@@ -87 +87 @@
         lgdtl bootstrap_gdtr
         lidtl bootstrap_idtr
-        
+
         /* Kernel data + stack */
         movw $GDT_SELECTOR(KDATA_DES), %cx
@@ -95 +95 @@
         movw %cx, %ds
         movw %cx, %ss
-        
+
         jmpl $GDT_SELECTOR(KTEXT_DES), $multiboot_meeting_point
         multiboot_meeting_point:
-        
+
         /* Save multiboot arguments */
         movl %eax, multiboot_eax
         movl %ebx, multiboot_ebx
-        
+
         pm_status $status_prot
-        
+
 #include "vesa_prot.inc"
-        
+
 #ifndef PROCESSOR_i486
-        
+
         pm_status $status_prot2
-        
+
         movl $(INTEL_CPUID_LEVEL), %eax
         cpuid
         cmp $0x0, %eax  /* any function > 0? */
         jbe pse_unsupported
-        
+
         movl $(INTEL_CPUID_STANDARD), %eax
         cpuid
         bt $(INTEL_PSE), %edx
         jnc pse_unsupported
-                
+
                 /* Map kernel and turn paging on */
                 pm_status $status_pse
                 call map_kernel_pse
                 jmp stack_init
-        
+
 #endif /* PROCESSOR_i486 */
-        
+
         pse_unsupported:
-                
+
                 /* Map kernel and turn paging on */
                 pm_status $status_non_pse
                 call map_kernel_non_pse
-        
+
         stack_init:
-        
+
         /* Create the first stack frame */
         pushl $0
         movl %esp, %ebp
-        
+
         pm2_status $status_prot3
-        
+
         /* Call ia32_pre_main(multiboot_eax, multiboot_ebx) */
         pushl multiboot_ebx
         pushl multiboot_eax
         call ia32_pre_main
-        
+
         pm2_status $status_main
-        
+
         /* Call main_bsp() */
         call main_bsp
-        
+
         /* Not reached */
         cli
@@ -170 +170 @@
         andl $~CR4_PAE, %ecx    /* PAE off */
         movl %ecx, %cr4
-        
+
         movl $(page_directory + 0), %esi
         movl $(page_directory + 2048), %edi
         xorl %ecx, %ecx
         xorl %ebx, %ebx
-        
+
         floop_pse:
                 movl $(PDE_4M | PDE_RW | PDE_P), %eax
@@ -184 +184 @@
                 movl %eax, (%edi, %ecx, 4)
                 addl $(4 * 1024 * 1024), %ebx
-                
+
                 incl %ecx
                 cmpl $512, %ecx
                 jl floop_pse
-        
+
         movl %esi, %cr3
-        
+
         movl %cr0, %ebx
         orl $CR0_PG, %ebx       /* paging on */
@@ -208 +208 @@
         andl $~CR4_PAE, %ecx  /* PAE off */
         movl %ecx, %cr4
-        
+
         call calc_kernel_end
         call find_mem_for_pt
-        
+
         mov kernel_end, %esi
         mov free_area, %ecx
-        
+
         cmpl %esi, %ecx
         jbe use_kernel_end
-                
+
                 mov %ecx, %esi
-                
+
                 /* Align address down to 4k */
                 andl $(~(PAGE_SIZE - 1)), %esi
-                
+
         use_kernel_end:
-                
+
                 /* Align address to 4k */
                 addl $(PAGE_SIZE - 1), %esi
                 andl $(~(PAGE_SIZE - 1)), %esi
-                
+
                 /* Allocate space for page tables */
                 movl %esi, pt_loc
                 movl $KA2PA(ballocs), %edi
-                
+
                 movl %esi, (%edi)
                 addl $4, %edi
                 movl $(2 * 1024 * 1024), (%edi)
-                
+
                 /* Fill page tables */
                 xorl %ecx, %ecx
                 xorl %ebx, %ebx
-                
+
                 floop_pt:
                         movl $(PTE_RW | PTE_P), %eax
@@ -246 +246 @@
                         movl %eax, (%esi, %ecx, 4)
                         addl $PAGE_SIZE, %ebx
-                        
+
                         incl %ecx
                         cmpl $(512 * 1024), %ecx
-                        
+
                         jl floop_pt
-                
+
                 /* Fill page directory */
                 movl $(page_directory + 0), %esi
@@ -257 +257 @@
                 xorl %ecx, %ecx
                 movl pt_loc, %ebx
-                
+
                 floop:
                         movl $(PDE_RW | PDE_P), %eax
                         orl %ebx, %eax
-                        
+
                         /* Mapping 0x00000000 + %ecx * 4M => 0x00000000 + %ecx * 4M */
                         movl %eax, (%esi, %ecx, 4)
-                        
+
                         /* Mapping 0x80000000 + %ecx * 4M => 0x00000000 + %ecx * 4M */
                         movl %eax, (%edi, %ecx, 4)
                         addl $PAGE_SIZE, %ebx
-                        
+
                         incl %ecx
                         cmpl $512, %ecx
-                        
+
                         jl floop
-                
+
                 movl %esi, %cr3
-                
+
                 movl %cr0, %ebx
                 orl $CR0_PG, %ebx  /* paging on */
                 movl %ebx, %cr0
-                
+
                 ret
 FUNCTION_END(map_kernel_non_pse)
@@ -288 +288 @@
         movl (%edi), %esi
         leal KA2PA(0)(%esi), %esi
-        
+
         movl $KA2PA(hardcoded_ktext_size), %edi
         addl (%edi), %esi
         leal KA2PA(0)(%esi), %esi
-        
+
         movl $KA2PA(hardcoded_kdata_size), %edi
         addl (%edi), %esi
         leal KA2PA(0)(%esi), %esi
         movl %esi, kernel_end
-        
+
         ret
 
@@ -305 +305 @@
         cmpl $MULTIBOOT_LOADER_MAGIC, multiboot_eax
         je check_multiboot_map
-                
+
                 ret
-        
+
         check_multiboot_map:
-                
+
                 /* Copy address of the multiboot info to ebx */
                 movl multiboot_ebx, %ebx
-                
+
                 /* Check if memory map flag is present */
                 movl (%ebx), %edx
                 andl $MULTIBOOT_INFO_FLAGS_MMAP, %edx
                 jnz use_multiboot_map
-                        
+
                         ret
-                
+
         use_multiboot_map:
-                
+
                 /* Copy address of the memory map to edx */
                 movl MULTIBOOT_INFO_OFFSET_MMAP_ADDR(%ebx), %edx
                 movl %edx, %ecx
-                
+
                 addl MULTIBOOT_INFO_OFFSET_MMAP_LENGTH(%ebx), %ecx
-                
+
                 /* Find a free region at least 2M in size */
                 check_memmap_loop:
-                        
+
                         /* Is this a free region? */
                         cmpl $MEMMAP_MEMORY_AVAILABLE, MULTIBOOT_MEMMAP_OFFSET_MM_INFO + E820MEMMAP_OFFSET_TYPE(%edx)
                         jnz next_region
-                        
+
                         /* Check size */
                         cmpl $0, MULTIBOOT_MEMMAP_OFFSET_MM_INFO + E820MEMMAP_OFFSET_SIZE + 4(%edx)
@@ -340 +340 @@
                         cmpl $(2 * 1024 * 1024 + PAGE_SIZE), MULTIBOOT_MEMMAP_OFFSET_MM_INFO + E820MEMMAP_OFFSET_SIZE(%edx)
                         jbe next_region
-                        
+
                         cmpl $0, MULTIBOOT_MEMMAP_OFFSET_MM_INFO + E820MEMMAP_OFFSET_BASE_ADDRESS + 4(%edx)
                         jz found_region
-                
+
                 next_region:
-                        
+
                         cmp %ecx, %edx
                         jbe next_region_do
-                        
+
                                 ret
-                
+
                 next_region_do:
-                        
+
                         addl MULTIBOOT_MEMMAP_OFFSET_SIZE(%edx), %edx
                         addl $MULTIBOOT_MEMMAP_SIZE_SIZE, %edx
                         jmp check_memmap_loop
-                        
+
                 found_region:
-                        
+
                         /* Use end of the found region */
                         mov MULTIBOOT_MEMMAP_OFFSET_MM_INFO + E820MEMMAP_OFFSET_BASE_ADDRESS(%edx), %ecx
@@ -364 +364 @@
                         sub $(2 * 1024 * 1024), %ecx
                         mov %ecx, free_area
-                        
+
                         ret
 
@@ -381 +381 @@
         movl $0xb8000, %edi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb err_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         err_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %eax
         addl %eax, %edi
-        
+
         err_ploop:
                 lodsb
-                
+
                 cmp $0, %al
                 je err_ploop_end
-                
+
                 movb $0x0c, %ah  /* black background, light red foreground */
                 stosw
-                
+
                 /* Sanity check for the cursor on the last line */
                 inc %bx
                 cmp $2000, %bx
                 jb err_ploop
-                
+
                 /* Scroll the screen (24 rows) */
                 movl %esi, %edx
@@ -431 +431 @@
                 movl $960, %ecx
                 rep movsl
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $40, %ecx
                 rep stosl
-                
+
                 /* Go to row 24 */
                 movl %edx, %esi
                 movl $0xb8f00, %edi
                 movw $1920, %bx
-                
+
                 jmp err_ploop
         err_ploop_end:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         cli
         hlt1:
@@ -486 +486 @@
         pushl %edx
         pushl %edi
-        
+
         movl $0xb8000, %edi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb pm_puts_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         pm_puts_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %eax
         addl %eax, %edi
-        
+
         pm_puts_ploop:
                 lodsb
-                
+
                 cmp $0, %al
                 je pm_puts_ploop_end
-                
+
                 movb $0x0a, %ah  /* black background, light green foreground */
                 stosw
-                
+
                 /* Sanity check for the cursor on the last line */
                 inc %bx
                 cmp $2000, %bx
                 jb pm_puts_ploop
-                
+
                 /* Scroll the screen (24 rows) */
                 movl %esi, %edx
@@ -539 +539 @@
                 movl $960, %ecx
                 rep movsl
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $40, %ecx
                 rep stosl
-                
+
                 /* Go to row 24 */
                 movl %edx, %esi
                 movl $0xb8f00, %edi
                 movw $1920, %bx
-                
+
                 jmp pm_puts_ploop
         pm_puts_ploop_end:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         popl %edi
         popl %edx
@@ -576 +576 @@
         popl %ebx
         popl %eax
-        
+
         ret
 
@@ -591 +591 @@
  */
 early_puts:
-        
+
 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
-        
+
         /* Prologue, save preserved registers */
         pushl %ebp
@@ -600 +600 @@
         pushl %esi
         pushl %edi
-        
+
         movl 0x08(%ebp), %esi
         movl $(PA2KA(0xb8000)), %edi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb early_puts_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         early_puts_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %eax
         addl %eax, %edi
-        
+
         early_puts_ploop:
                 lodsb
-                
+
                 cmp $0, %al
                 je early_puts_ploop_end
-                
+
                 movb $0x0e, %ah  /* black background, yellow foreground */
                 stosw
-                
+
                 /* Sanity check for the cursor on the last line */
                 inc %bx
                 cmp $2000, %bx
                 jb early_puts_ploop
-                
+
                 /* Scroll the screen (24 rows) */
                 movl %esi, %edx
@@ -654 +654 @@
                 movl $960, %ecx
                 rep movsl
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $40, %ecx
                 rep stosl
-                
+
                 /* Go to row 24 */
                 movl %edx, %esi
                 movl $(PA2KA(0xb8f00)), %edi
                 movw $1920, %bx
-                
+
                 jmp early_puts_ploop
         early_puts_ploop_end:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         /* Epilogue, restore preserved registers */
         popl %edi
@@ -691 +691 @@
         popl %ebx
         leave
-        
+
 #endif
-        
+
         ret
 

kernel/arch/ia32/src/boot/multiboot2.S

@@ -45 +45 @@
         .long multiboot2_header_end - multiboot2_header_start
         .long -(MULTIBOOT2_HEADER_MAGIC + MULTIBOOT2_HEADER_ARCH_I386 + (multiboot2_header_end - multiboot2_header_start))
-        
+
         /* Information request tag */
         .align 8
@@ -59 +59 @@
 #endif
         tag_info_req_end:
-        
+
         /* Address tag */
         .align 8
@@ -71 +71 @@
                 .long 0
         tag_address_end:
-        
+
         /* Entry address tag */
         .align 8
@@ -80 +80 @@
                 .long multiboot2_image_start
         tag_entry_address_end:
-        
+
         /* Flags tag */
         .align 8
@@ -89 +89 @@
                 .long MULTIBOOT2_FLAGS_CONSOLE
         tag_flags_end:
-        
+
 #ifdef CONFIG_FB
         /* Framebuffer tag */
@@ -102 +102 @@
         tag_framebuffer_end:
 #endif
-        
+
         /* Module alignment tag */
         .align 8
@@ -111 +111 @@
                 .long 0
         tag_module_align_end:
-        
+
         /* Tag terminator */
         .align 8
@@ -124 +124 @@
         cli
         cld
-        
+
         /* Initialize stack pointer */
         movl $START_STACK, %esp
-        
+
         /*
          * Initialize Global Descriptor Table and
@@ -134 +134 @@
         lgdtl bootstrap_gdtr
         lidtl bootstrap_idtr
-        
+
         /* Kernel data + stack */
         movw $GDT_SELECTOR(KDATA_DES), %cx
@@ -142 +142 @@
         movw %cx, %ds
         movw %cx, %ss
-        
+
         jmpl $GDT_SELECTOR(KTEXT_DES), $multiboot2_meeting_point
         multiboot2_meeting_point:
-        
+
         /* Save multiboot arguments */
         movl %eax, multiboot_eax
         movl %ebx, multiboot_ebx
-        
+
 #ifndef PROCESSOR_i486
-        
+
         movl $(INTEL_CPUID_LEVEL), %eax
         cpuid
         cmp $0x0, %eax  /* any function > 0? */
         jbe pse_unsupported
-        
+
         movl $(INTEL_CPUID_STANDARD), %eax
         cpuid
         bt $(INTEL_PSE), %edx
         jnc pse_unsupported
-                
+
                 /* Map kernel and turn paging on */
                 call map_kernel_pse
                 jmp stack_init
-        
+
 #endif /* PROCESSOR_i486 */
-        
+
         pse_unsupported:
-                
+
                 /* Map kernel and turn paging on */
                 call map_kernel_non_pse
-        
+
         stack_init:
-        
+
         /* Create the first stack frame */
         pushl $0
         movl %esp, %ebp
-        
+
         /* Call ia32_pre_main(multiboot_eax, multiboot_ebx) */
         pushl multiboot_ebx
         pushl multiboot_eax
         call ia32_pre_main
-        
+
         /* Call main_bsp() */
         call main_bsp
-        
+
         /* Not reached */
         cli

kernel/arch/ia32/src/cpu/cpu.c

@@ -84 +84 @@
         cpu_info_t info;
         uint32_t help = 0;
-        
+
         CPU->arch.tss = tss_p;
         CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
-        
+
         CPU->fpu_owner = NULL;
-        
+
         cpuid(INTEL_CPUID_STANDARD, &info);
-        
+
         CPU->arch.fi.word = info.cpuid_edx;
-        
+
         if (CPU->arch.fi.bits.fxsr)
                 fpu_fxsr();
         else
                 fpu_fsr();
-        
+
         if (CPU->arch.fi.bits.sse) {
                 asm volatile (
@@ -108 +108 @@
                 );
         }
-        
+
 #ifndef PROCESSOR_i486
         if (CPU->arch.fi.bits.sep) {
@@ -132 +132 @@
                     && (info.cpuid_edx == AMD_CPUID_EDX))
                         CPU->arch.vendor = VendorAMD;
-                
+
                 /*
                  * Check for Intel processor.
@@ -140 +140 @@
                     && (info.cpuid_edx == INTEL_CPUID_EDX))
                         CPU->arch.vendor = VendorIntel;
-                
+
                 cpuid(INTEL_CPUID_STANDARD, &info);
                 CPU->arch.family = (info.cpuid_eax >> 8) & 0x0fU;

kernel/arch/ia32/src/ddi/ddi.c

@@ -59 +59 @@
         /* First, copy the I/O Permission Bitmap. */
         irq_spinlock_lock(&TASK->lock, false);
-        
+
         size_t ver = TASK->arch.iomapver;
         size_t elements = TASK->arch.iomap.elements;
-        
+
         if (elements > 0) {
                 assert(TASK->arch.iomap.bits);
-                
+
                 bitmap_t iomap;
                 bitmap_initialize(&iomap, TSS_IOMAP_SIZE * 8,
                     CPU->arch.tss->iomap);
                 bitmap_copy(&iomap, &TASK->arch.iomap, elements);
-                
+
                 /*
                  * Set the trailing bits in the last byte of the map to disable
@@ -77 +77 @@
                 bitmap_set_range(&iomap, elements,
                     ALIGN_UP(elements, 8) - elements);
-                
+
                 /*
                  * It is safe to set the trailing eight bits because of the
@@ -84 +84 @@
                 bitmap_set_range(&iomap, ALIGN_UP(elements, 8), 8);
         }
-        
+
         irq_spinlock_unlock(&TASK->lock, false);
-        
+
         /*
          * Second, adjust TSS segment limit.
@@ -93 +93 @@
         ptr_16_32_t cpugdtr;
         gdtr_store(&cpugdtr);
-        
+
         descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
         size_t size = bitmap_size(elements);
         gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + size);
         gdtr_load(&cpugdtr);
-        
+
         /*
          * Before we load new TSS limit, the current TSS descriptor
@@ -105 +105 @@
         gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
         tr_load(GDT_SELECTOR(TSS_DES));
-        
+
         /*
          * Update the generation count so that faults caused by

kernel/arch/ia32/src/drivers/i8254.c

@@ -89 +89 @@
         i8254_irq.handler = i8254_irq_handler;
         irq_register(&i8254_irq);
-        
+
         i8254_normal_operation();
 }
@@ -111 +111 @@
         pio_write_8(CLK_PORT1, 0xff);
         pio_write_8(CLK_PORT1, 0xff);
-        
+
         uint8_t not_ok;
         uint32_t t1;
         uint32_t t2;
-        
+
         do {
                 /* will read both status and count */
@@ -123 +123 @@
                 t1 |= pio_read_8(CLK_PORT1) << 8;
         } while (not_ok);
-        
+
         asm_delay_loop(LOOPS);
-        
+
         pio_write_8(CLK_PORT4, 0xd2);
         t2 = pio_read_8(CLK_PORT1);
         t2 |= pio_read_8(CLK_PORT1) << 8;
-        
+
         /*
          * We want to determine the overhead of the calibrating mechanism.
@@ -136 +136 @@
         uint32_t o1 = pio_read_8(CLK_PORT1);
         o1 |= pio_read_8(CLK_PORT1) << 8;
-        
+
         asm_fake_loop(LOOPS);
-        
+
         pio_write_8(CLK_PORT4, 0xd2);
         uint32_t o2 = pio_read_8(CLK_PORT1);
         o2 |= pio_read_8(CLK_PORT1) << 8;
-        
+
         CPU->delay_loop_const =
             ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
             (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0);
-        
+
         uint64_t clk1 = get_cycle();
         delay(1 << SHIFT);
         uint64_t clk2 = get_cycle();
-        
+
         CPU->frequency_mhz = (clk2 - clk1) >> SHIFT;
-        
+
         return;
 }

kernel/arch/ia32/src/fpu_context.c

@@ -59 +59 @@
         X87_DENORMAL_EXC_FLAG = (1 << 1),
         X87_INVALID_OP_EXC_FLAG = (1 << 0),
-        
+
         X87_ALL_MASK = X87_PRECISION_MASK | X87_UNDERFLOW_MASK | X87_OVERFLOW_MASK | X87_ZERO_DIV_MASK | X87_DENORMAL_OP_MASK | X87_INVALID_OP_MASK,
 };
@@ -129 +129 @@
         uint32_t help0 = 0;
         uint32_t help1 = 0;
-        
+
         asm volatile (
                 "fninit\n"

kernel/arch/ia32/src/ia32.c

@@ -92 +92 @@
         multiboot_info_parse(signature, (multiboot_info_t *) info);
         multiboot2_info_parse(signature, (multiboot2_info_t *) info);
-        
+
 #ifdef CONFIG_SMP
         /* Copy AP bootstrap routines below 1 MB. */
@@ -107 +107 @@
                 interrupt_init();
                 bios_init();
-                
+
                 /* PIC */
                 i8259_init();
@@ -120 +120 @@
                 /* Initialize IRQ routing */
                 irq_init(IRQ_COUNT, IRQ_COUNT);
-                
+
                 /* hard clock */
                 i8254_init();
-                
+
 #if (defined(CONFIG_FB) || defined(CONFIG_EGA))
                 bool bfb = false;
 #endif
-                
+
 #ifdef CONFIG_FB
                 bfb = bfb_init();
 #endif
-                
+
 #ifdef CONFIG_EGA
                 if (!bfb) {
@@ -139 +139 @@
                 }
 #endif
-                
+
                 /* Merge all memory zones to 1 big zone */
                 zone_merge_all();
@@ -220 +220 @@
         }
 #endif
-        
+
         if (irqs_info != NULL)
                 sysinfo_set_item_val(irqs_info, NULL, true);

kernel/arch/ia32/src/interrupt.c

@@ -72 +72 @@
             "efl=%0#10" PRIx32 "\terr=%0#10" PRIx32 "\n",
             istate->cs, istate->eip, istate->eflags, istate->error_word);
-        
+
         printf("ds =%0#10" PRIx32 "\tes =%0#10" PRIx32 "\t"
             "fs =%0#10" PRIx32 "\tgs =%0#10" PRIx32 "\n",
             istate->ds, istate->es, istate->fs, istate->gs);
-        
+
         if (istate_from_uspace(istate))
                 printf("ss =%0#10" PRIx32 "\n", istate->ss);
-        
+
         printf("eax=%0#10" PRIx32 "\tebx=%0#10" PRIx32 "\t"
             "ecx=%0#10" PRIx32 "\tedx=%0#10" PRIx32 "\n",
             istate->eax, istate->ebx, istate->ecx, istate->edx);
-        
+
         printf("esi=%0#10" PRIx32 "\tedi=%0#10" PRIx32 "\t"
             "ebp=%0#10" PRIx32 "\tesp=%0#10" PRIxn "\n",
@@ -119 +119 @@
                 size_t ver = TASK->arch.iomapver;
                 irq_spinlock_unlock(&TASK->lock, false);
-                
+
                 if (CPU->arch.iomapver_copy != ver) {
                         /*
@@ -149 +149 @@
                 : [mxcsr] "=m" (mxcsr)
         );
-        
+
         fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".",
             mxcsr);
@@ -185 +185 @@
 {
         assert(n >= IVT_IRQBASE);
-        
+
         unsigned int inum = n - IVT_IRQBASE;
         bool ack = false;
         assert(inum < IRQ_COUNT);
         assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
-        
+
         irq_t *irq = irq_dispatch_and_lock(inum);
         if (irq) {
@@ -196 +196 @@
                  * The IRQ handler was found.
                  */
-                
+
                 if (irq->preack) {
                         /* Send EOI before processing the interrupt */
@@ -212 +212 @@
 #endif
         }
-        
+
         if (!ack)
                 trap_virtual_eoi();
@@ -220 +220 @@
 {
         unsigned int i;
-        
+
         for (i = 0; i < IVT_ITEMS; i++)
                 exc_register(i, "null", false, (iroutine_t) null_interrupt);
-        
+
         for (i = 0; i < IRQ_COUNT; i++) {
                 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
@@ -229 +229 @@
                             (iroutine_t) irq_interrupt);
         }
-        
+
         exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
         exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
@@ -235 +235 @@
         exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
         exc_register(VECTOR_XM, "simd_fp", true, (iroutine_t) simd_fp_exception);
-        
+
 #ifdef CONFIG_SMP
         exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,

kernel/arch/ia32/src/mm/frame.c

@@ -54 +54 @@
 {
         unsigned int i;
-        
+
         for (i = 0; i < e820counter; i++) {
                 uint64_t base64 = e820table[i].base_address;
                 uint64_t size64 = e820table[i].size;
-                
+
 #ifdef KARCH_ia32
                 /*
@@ -65 +65 @@
                 if (base64 >= PHYSMEM_LIMIT32)
                         continue;
-                
+
                 if (base64 + size64 > PHYSMEM_LIMIT32)
                         size64 = PHYSMEM_LIMIT32 - base64;
 #endif
-                
+
                 uintptr_t base = (uintptr_t) base64;
                 size_t size = (size_t) size64;
-                
+
                 if (!frame_adjust_zone_bounds(low, &base, &size))
                         continue;
-                
+
                 if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) {
                         /* To be safe, make the available zone possibly smaller */
@@ -81 +81 @@
                         uint64_t new_size = ALIGN_DOWN(size - (new_base - base),
                             FRAME_SIZE);
-                        
+
                         size_t count = SIZE2FRAMES(new_size);
                         pfn_t pfn = ADDR2PFN(new_base);
                         pfn_t conf;
-                        
+
                         if (low) {
                                 if ((minconf < pfn) || (minconf >= pfn + count))
@@ -105 +105 @@
                         uint64_t new_size = ALIGN_UP(size + (base - new_base),
                             FRAME_SIZE);
-                        
+
                         zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
                             ZONE_FIRMWARE);
@@ -113 +113 @@
                         uint64_t new_size = ALIGN_UP(size + (base - new_base),
                             FRAME_SIZE);
-                        
+
                         zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
                             ZONE_RESERVED);
@@ -133 +133 @@
         unsigned int i;
         printf("[base            ] [size            ] [name   ]\n");
-        
+
         for (i = 0; i < e820counter; i++) {
                 const char *name;
-                
+
                 if (e820table[i].type <= MEMMAP_MEMORY_UNUSABLE)
                         name = e820names[e820table[i].type];
                 else
                         name = "invalid";
-                
+
                 printf("%#018" PRIx64 " %#018" PRIx64" %s\n", e820table[i].base_address,
                     e820table[i].size, name);
@@ -150 +150 @@
 {
         pfn_t minconf;
-        
+
         if (config.cpu_active == 1) {
                 minconf = 1;
-                
+
 #ifdef CONFIG_SMP
                 minconf = max(minconf,
@@ -159 +159 @@
                     hardcoded_unmapped_kdata_size));
 #endif
-                
+
                 init_e820_memory(minconf, true);
-                
+
                 /* Reserve frame 0 (BIOS data) */
                 frame_mark_unavailable(0, 1);
-                
+
 #ifdef CONFIG_SMP
                 /* Reserve AP real mode bootstrap memory */

kernel/arch/ia32/src/mm/page.c

@@ -54 +54 @@
         uintptr_t cur;
         int flags;
-        
+
         if (config.cpu_active > 1) {
                 /* Fast path for non-boot CPUs */
@@ -63 +63 @@
 
         page_mapping_operations = &pt_mapping_operations;
-        
+
         /*
          * PA2KA(identity) mapping for all low-memory frames.
@@ -74 +74 @@
         }
         page_table_unlock(AS_KERNEL, true);
-                
+
         exc_register(VECTOR_PF, "page_fault", true, (iroutine_t) page_fault);
         write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
-        
+
         paging_on();
 }
@@ -85 +85 @@
         uintptr_t badvaddr;
         pf_access_t access;
-        
+
         badvaddr = read_cr2();
-                
+
         if (istate->error_word & PFERR_CODE_RSVD)
                 panic("Reserved bit set in page directory.");
-        
+
         if (istate->error_word & PFERR_CODE_RW)
                 access = PF_ACCESS_WRITE;
         else
                 access = PF_ACCESS_READ;
-        
+
         (void) as_page_fault(badvaddr, access, istate);
 }

kernel/arch/ia32/src/pm.c

@@ -269 +269 @@
         gdtr_load(&gdtr);
         idtr_load(&idtr);
-        
+
         /*
          * Each CPU has its private GDT and TSS.
@@ -289 +289 @@
 
         tss_initialize(tss_p);
-        
+
         gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
         gdt_p[TSS_DES].special = 1;
         gdt_p[TSS_DES].granularity = 0;
-        
+
         gdt_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p);
         gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
@@ -302 +302 @@
          */
         tr_load(GDT_SELECTOR(TSS_DES));
-        
+
         /* Disable I/O on nonprivileged levels and clear NT flag. */
         write_eflags(read_eflags() & ~(EFLAGS_IOPL | EFLAGS_NT));

kernel/arch/ia32/src/proc/scheduler.c

@@ -59 +59 @@
 {
         uintptr_t kstk = (uintptr_t) &THREAD->kstack[STACK_SIZE];
-        
+
 #ifndef PROCESSOR_i486
         if (CPU->arch.fi.bits.sep) {
@@ -66 +66 @@
         }
 #endif
-        
+
         /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
         CPU->arch.tss->esp0 = kstk;

kernel/arch/ia32/src/smp/ap.S

@@ -62 +62 @@
         /* initialize Global Descriptor Table register */
         lgdtl ap_gdtr
-        
+
         /* switch to protected mode */
         movl %cr0, %eax
@@ -68 +68 @@
         movl %eax, %cr0
         jmpl $KTEXT, $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET
-        
+
 jump_to_kernel:
 .code32
@@ -84 +84 @@
          */
         call map_kernel_pse
-        
+
         addl $PA2KA(0), %esp            /* PA2KA(ctx.sp) */
-        
+
         /* create the first stack frame */
         pushl $0

kernel/arch/ia32/src/smp/apic.c

@@ -164 +164 @@
 {
         l_apic_id_t idreg;
-        
+
         idreg.value = l_apic[L_APIC_ID];
         return idreg.apic_id;
@@ -174 +174 @@
         exc_register(VECTOR_APIC_SPUR, "apic_spurious", false,
             (iroutine_t) apic_spurious);
-        
+
         enable_irqs_function = io_apic_enable_irqs;
         disable_irqs_function = io_apic_disable_irqs;
         eoi_function = l_apic_eoi;
         irqs_info = "apic";
-        
+
         /*
          * Configure interrupt routing.
@@ -186 +186 @@
          */
         io_apic_disable_irqs(0xffffU);
-        
+
         irq_initialize(&l_apic_timer_irq);
         l_apic_timer_irq.preack = true;
@@ -193 +193 @@
         l_apic_timer_irq.handler = l_apic_timer_irq_handler;
         irq_register(&l_apic_timer_irq);
-        
+
         uint8_t i;
         for (i = 0; i < IRQ_COUNT; i++) {
                 int pin;
-                
+
                 if ((pin = smp_irq_to_pin(i)) != -1)
                         io_apic_change_ioredtbl((uint8_t) pin, DEST_ALL, (uint8_t) (IVT_IRQBASE + i), LOPRI);
         }
-        
+
         /*
          * Ensure that io_apic has unique ID.
          */
         io_apic_id_t idreg;
-        
+
         idreg.value = io_apic_read(IOAPICID);
         if ((1 << idreg.apic_id) & apic_id_mask) {  /* See if IO APIC ID is used already */
@@ -217 +217 @@
                 }
         }
-        
+
         /*
          * Configure the BSP's lapic.
@@ -223 +223 @@
         l_apic_init();
         l_apic_debug();
-        
+
         bsp_l_apic = l_apic_id();
 }
@@ -237 +237 @@
 {
         esr_t esr;
-        
+
         esr.value = l_apic[ESR];
-        
+
         if (esr.err_bitmap) {
                 log_begin(LF_ARCH, LVL_ERROR);
@@ -259 +259 @@
                 log_end();
         }
-        
+
         return !esr.err_bitmap;
 }
@@ -267 +267 @@
 {
         icr_t icr;
-        
+
         do {
                 icr.lo = l_apic[ICRlo];
@@ -286 +286 @@
         /* Wait for a destination cpu to accept our previous ipi. */
         l_apic_wait_for_delivery();
-        
+
         icr.lo = l_apic[ICRlo];
         icr.hi = l_apic[ICRhi];
-        
+
         icr.delmod = DELMOD_FIXED;
         icr.destmod = DESTMOD_PHYS;
@@ -301 +301 @@
         l_apic[ICRhi] = icr.hi;
         l_apic[ICRlo] = icr.lo;
-        
+
         return apic_poll_errors();
 }
@@ -318 +318 @@
         /* Wait for a destination cpu to accept our previous ipi. */
         l_apic_wait_for_delivery();
-        
+
         icr.lo = l_apic[ICRlo];
         icr.delmod = DELMOD_FIXED;
@@ -326 +326 @@
         icr.trigger_mode = TRIGMOD_LEVEL;
         icr.vector = vector;
-        
+
         l_apic[ICRlo] = icr.lo;
-        
+
         return apic_poll_errors();
 }
@@ -345 +345 @@
          */
         icr_t icr;
-        
+
         icr.lo = l_apic[ICRlo];
         icr.hi = l_apic[ICRhi];
-        
+
         icr.delmod = DELMOD_INIT;
         icr.destmod = DESTMOD_PHYS;
@@ -356 +356 @@
         icr.vector = 0;
         icr.dest = apicid;
-        
+
         l_apic[ICRhi] = icr.hi;
         l_apic[ICRlo] = icr.lo;
-        
+
         /*
          * According to MP Specification, 20us should be enough to
@@ -365 +365 @@
          */
         delay(20);
-        
+
         if (!apic_poll_errors())
                 return 0;
-        
+
         l_apic_wait_for_delivery();
 
@@ -379 +379 @@
         icr.vector = 0;
         l_apic[ICRlo] = icr.lo;
-        
+
         /*
          * Wait 10ms as MP Specification specifies.
          */
         delay(10000);
-        
+
         if (!is_82489DX_apic(l_apic[LAVR])) {
                 /*
@@ -402 +402 @@
                 }
         }
-        
+
         return apic_poll_errors();
 }
@@ -411 +411 @@
         /* Initialize LVT Error register. */
         lvt_error_t error;
-        
+
         error.value = l_apic[LVT_Err];
         error.masked = true;
         l_apic[LVT_Err] = error.value;
-        
+
         /* Initialize LVT LINT0 register. */
         lvt_lint_t lint;
-        
+
         lint.value = l_apic[LVT_LINT0];
         lint.masked = true;
         l_apic[LVT_LINT0] = lint.value;
-        
+
         /* Initialize LVT LINT1 register. */
         lint.value = l_apic[LVT_LINT1];
         lint.masked = true;
         l_apic[LVT_LINT1] = lint.value;
-        
+
         /* Task Priority Register initialization. */
         tpr_t tpr;
-        
+
         tpr.value = l_apic[TPR];
         tpr.pri_sc = 0;
         tpr.pri = 0;
         l_apic[TPR] = tpr.value;
-        
+
         /* Spurious-Interrupt Vector Register initialization. */
         svr_t svr;
-        
+
         svr.value = l_apic[SVR];
         svr.vector = VECTOR_APIC_SPUR;
@@ -444 +444 @@
         svr.focus_checking = true;
         l_apic[SVR] = svr.value;
-        
+
         if (CPU->arch.family >= 6)
                 enable_l_apic_in_msr();
-        
+
         /* Interrupt Command Register initialization. */
         icr_t icr;
-        
+
         icr.lo = l_apic[ICRlo];
         icr.delmod = DELMOD_INIT;
@@ -458 +458 @@
         icr.trigger_mode = TRIGMOD_LEVEL;
         l_apic[ICRlo] = icr.lo;
-        
+
         /* Timer Divide Configuration Register initialization. */
         tdcr_t tdcr;
-        
+
         tdcr.value = l_apic[TDCR];
         tdcr.div_value = DIVIDE_1;
         l_apic[TDCR] = tdcr.value;
-        
+
         /* Program local timer. */
         lvt_tm_t tm;
-        
+
         tm.value = l_apic[LVT_Tm];
         tm.vector = VECTOR_CLK;
@@ -474 +474 @@
         tm.masked = false;
         l_apic[LVT_Tm] = tm.value;
-        
+
         /*
          * Measure and configure the timer to generate timer
@@ -481 +481 @@
         uint32_t t1 = l_apic[CCRT];
         l_apic[ICRT] = 0xffffffff;
-        
+
         while (l_apic[CCRT] == t1);
-        
+
         t1 = l_apic[CCRT];
         delay(1000000 / HZ);
         uint32_t t2 = l_apic[CCRT];
-        
+
         l_apic[ICRT] = t1 - t2;
-        
+
         /* Program Logical Destination Register. */
         assert(CPU->id < 8);
         ldr_t ldr;
-        
+
         ldr.value = l_apic[LDR];
         ldr.id = (uint8_t) (1 << CPU->id);
         l_apic[LDR] = ldr.value;
-        
+
         /* Program Destination Format Register for Flat mode. */
         dfr_t dfr;
-        
+
         dfr.value = l_apic[DFR];
         dfr.model = MODEL_FLAT;
@@ -519 +519 @@
         log_printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n",
             CPU->id, l_apic_id());
-        
+
         lvt_tm_t tm;
         tm.value = l_apic[LVT_Tm];
@@ -525 +525 @@
             tm.vector, delivs_str[tm.delivs], mask_str[tm.masked],
             tm_mode_str[tm.mode]);
-        
+
         lvt_lint_t lint;
         lint.value = l_apic[LVT_LINT0];
@@ -532 +532 @@
             intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode],
             mask_str[lint.masked]);
-        
+
         lint.value = l_apic[LVT_LINT1];
         log_printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",
@@ -538 +538 @@
             intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode],
             mask_str[lint.masked]);
-        
+
         lvt_error_t error;
         error.value = l_apic[LVT_Err];
@@ -557 +557 @@
 {
         io_regsel_t regsel;
-        
+
         regsel.value = io_apic[IOREGSEL];
         regsel.reg_addr = address;
@@ -573 +573 @@
 {
         io_regsel_t regsel;
-        
+
         regsel.value = io_apic[IOREGSEL];
         regsel.reg_addr = address;
@@ -592 +592 @@
 {
         unsigned int dlvr;
-        
+
         if (flags & LOPRI)
                 dlvr = DELMOD_LOWPRI;
         else
                 dlvr = DELMOD_FIXED;
-        
+
         io_redirection_reg_t reg;
         reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2));
         reg.hi = io_apic_read((uint8_t) (IOREDTBL + pin * 2 + 1));
-        
+
         reg.dest = dest;
         reg.destmod = DESTMOD_LOGIC;
@@ -608 +608 @@
         reg.delmod = dlvr;
         reg.intvec = vec;
-        
+
         io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo);
         io_apic_write((uint8_t) (IOREDTBL + pin * 2 + 1), reg.hi);
@@ -630 +630 @@
                         if (pin != -1) {
                                 io_redirection_reg_t reg;
-                                
+
                                 reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2));
                                 reg.masked = true;
                                 io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo);
                         }
-                        
+
                 }
         }
@@ -657 +657 @@
                         if (pin != -1) {
                                 io_redirection_reg_t reg;
-                                
+
                                 reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2));
                                 reg.masked = false;
                                 io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo);
                         }
-                        
+
                 }
         }

kernel/arch/ia32/src/smp/mps.c

@@ -75 +75 @@
 {
         assert(i < processor_entry_cnt);
-        
+
         return processor_entries[i].l_apic_id;
 }
@@ -82 +82 @@
 {
         assert(i < processor_entry_cnt);
-        
+
         /*
          * FIXME: The current local APIC driver limits usable
@@ -90 +90 @@
         if (i > 7)
                 return false;
-        
+
         return ((processor_entries[i].cpu_flags & 0x01) == 0x01);
 }
@@ -97 +97 @@
 {
         assert(i < processor_entry_cnt);
-        
+
         return ((processor_entries[i].cpu_flags & 0x02) == 0x02);
 }
@@ -104 +104 @@
 {
         size_t i;
-        
+
         for (i = 0; i < io_intr_entry_cnt; i++) {
                 if (io_intr_entries[i].src_bus_irq == irq &&
@@ -110 +110 @@
                         return io_intr_entries[i].dst_io_apic_pin;
         }
-        
+
         return -1;
 }
@@ -131 +131 @@
         unsigned int i;
         uint8_t sum;
-        
+
         for (i = 0, sum = 0; i < 16; i++)
                 sum = (uint8_t) (sum + base[i]);
-        
+
         return (sum == 0);
 }
@@ -147 +147 @@
         uint8_t sum;
         uint16_t i;
-        
+
         /* Compute the checksum for the base table */
         for (i = 0, sum = 0; i < ct->base_table_length; i++)
                 sum = (uint8_t) (sum + base[i]);
-        
+
         if (sum)
                 return false;
-        
+
         /* Compute the checksum for the extended table */
         for (i = 0, sum = 0; i < ct->ext_table_length; i++)
                 sum = (uint8_t) (sum + ext[i]);
-        
+
         return (sum == ct->ext_table_checksum);
 }
@@ -169 +169 @@
         if ((pr->cpu_flags & (1 << 0)) == 0)
                 return;
-        
+
         apic_id_mask |= (1 << pr->l_apic_id);
 }
@@ -177 +177 @@
 #ifdef MPSCT_VERBOSE
         char buf[7];
-        
+
         memcpy((void *) buf, (void *) bus->bus_type, 6);
         buf[6] = 0;
-        
+
         log(LF_ARCH, LVL_DEBUG, "MPS: bus=%" PRIu8 " (%s)", bus->bus_id, buf);
 #endif
@@ -190 +190 @@
         if ((ioa->io_apic_flags & 1) == 0)
                 return;
-        
+
         if (io_apic_cnt++ > 0) {
                 /*
@@ -197 +197 @@
                 return;
         }
-        
+
         io_apic = (uint32_t *) (uintptr_t) ioa->io_apic;
 }
@@ -207 +207 @@
         log_begin(LF_ARCH, LVL_DEBUG);
         log_printf("MPS: ");
-        
+
         switch (iointr->intr_type) {
         case 0:
@@ -222 +222 @@
                 break;
         }
-        
+
         log_printf(", ");
-        
+
         switch (iointr->poel & 3) {
         case 0:
@@ -239 +239 @@
                 break;
         }
-        
+
         log_printf(", ");
-        
+
         switch ((iointr->poel >> 2) & 3) {
         case 0:
@@ -256 +256 @@
                 break;
         }
-        
+
         log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " io_apic=%" PRIu8" pin=%"
             PRIu8, iointr->src_bus_id, iointr->src_bus_irq,
@@ -270 +270 @@
         log_begin(LF_ARCH, LVL_DEBUG);
         log_printf("MPS: ");
-        
+
         switch (lintr->intr_type) {
         case 0:
@@ -285 +285 @@
                 break;
         }
-        
+
         log_printf(", ");
-        
+
         switch (lintr->poel & 3) {
         case 0:
@@ -302 +302 @@
                 break;
         }
-        
+
         log_printf(", ");
-        
+
         switch ((lintr->poel >> 2) & 3) {
         case 0:
@@ -319 +319 @@
                 break;
         }
-        
+
         log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " l_apic=%" PRIu8" pin=%"
             PRIu8, lintr->src_bus_id, lintr->src_bus_irq,
@@ -331 +331 @@
         uint8_t *ext = (uint8_t *) ct + ct->base_table_length;
         uint8_t *cur;
-        
+
         for (cur = ext; cur < ext + ct->ext_table_length;
             cur += cur[CT_EXT_ENTRY_LEN]) {
@@ -349 +349 @@
                 return;
         }
-        
+
         if (!mps_ct_check()) {
                 log(LF_ARCH, LVL_WARN, "MPS: Wrong ct checksum");
                 return;
         }
-        
+
         if (ct->oem_table) {
                 log(LF_ARCH, LVL_WARN, "MPS: ct->oem_table not supported");
                 return;
         }
-        
+
         l_apic = (uint32_t *) (uintptr_t) ct->l_apic;
-        
+
         uint8_t *cur = &ct->base_table[0];
         uint16_t i;
-        
+
         for (i = 0; i < ct->entry_count; i++) {
                 switch (*cur) {
@@ -411 +411 @@
                 }
         }
-        
+
         /*
          * Process extended entries.
@@ -432 +432 @@
         unsigned int j;
         unsigned int length[2] = { 1024, 64 * 1024 };
-        
+
         /*
          * Find MP Floating Pointer Structure
@@ -439 +439 @@
          *  2.  search 64K starting at 0xf0000
          */
-        
+
         addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024);
         for (i = 0; i < 2; i++) {
@@ -450 +450 @@
                 }
         }
-        
+
         return;
-        
+
 fs_found:
         log(LF_ARCH, LVL_NOTE, "%p: MPS Floating Pointer Structure", fs);
-        
+
         if ((fs->config_type == 0) && (fs->configuration_table)) {
                 if (fs->mpfib2 >> 7) {
@@ -461 +461 @@
                         return;
                 }
-                
+
                 ct = (struct mps_ct *) PA2KA((uintptr_t) fs->configuration_table);
                 configure_via_ct();
         } else
                 configure_via_default(fs->config_type);
-        
+
         if (processor_entry_cnt > 0)
                 config.cpu_count = processor_entry_cnt;

kernel/arch/ia32/src/smp/smp.c

@@ -68 +68 @@
                 ops = &madt_config_operations;
         }
-        
+
         if (config.cpu_count == 1) {
                 mps_init();
                 ops = &mps_config_operations;
         }
-        
+
         if (config.cpu_count > 1) {
                 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,
@@ -86 +86 @@
         assert(ops != NULL);
         assert(cpus != NULL);
-        
+
         for (unsigned int i = 0; i < config.cpu_count; ++i) {
                 cpus[i].arch.id = ops->cpu_apic_id(i);
@@ -102 +102 @@
 {
         unsigned int i;
-        
+
         assert(ops != NULL);
 
@@ -110 +110 @@
          */
         cpu_arch_id_init();
-        
+
         /*
          * We need to access data in frame 0.
          * We boldly make use of kernel address space mapping.
          */
-        
+
         /*
          * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
@@ -122 +122 @@
             (uint16_t) (((uintptr_t) ap_boot) >> 4);  /* segment */
         *((uint16_t *) (PA2KA(0x467 + 2))) = 0;       /* offset */
-        
+
         /*
          * Save 0xa to address 0xf of the CMOS RAM.
@@ -129 +129 @@
         pio_write_8((ioport8_t *) 0x70, 0xf);
         pio_write_8((ioport8_t *) 0x71, 0xa);
-        
+
         pic_disable_irqs(0xffff);
         apic_init();
-        
+
         for (i = 0; i < config.cpu_count; i++) {
                 /*
@@ -139 +139 @@
                 if (!ops->cpu_enabled(i))
                         continue;
-                
+
                 /*
                  * The bootstrap processor is already up.
@@ -145 +145 @@
                 if (ops->cpu_bootstrap(i))
                         continue;
-                
+
                 if (ops->cpu_apic_id(i) == bsp_l_apic) {
                         log(LF_ARCH, LVL_ERROR, "kmp: bad processor entry #%u, "
@@ -151 +151 @@
                         continue;
                 }
-                
+
                 /*
                  * Prepare new GDT for CPU in question.
                  */
-                
+
                 /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
                  * it needs to be replaced by a generic fuctionality of
@@ -165 +165 @@
                 if (!gdt_new)
                         panic("Cannot allocate memory for GDT.");
-                
+
                 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
                 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
@@ -171 +171 @@
                 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
                 gdtr.base = (uintptr_t) gdt_new;
-                
+
                 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
                         /*

kernel/arch/ia32/src/userspace.c

@@ -50 +50 @@
 {
         uint32_t eflags = read_eflags();
-        
+
         asm volatile (
                 /* Set up GS register (virtual register segment) */
                 "movl %[vreg_des], %%gs\n"
-                
+
                 "pushl %[udata_des]\n"
                 "pushl %[stack_top]\n"
@@ -61 +61 @@
                 "pushl %[entry]\n"
                 "movl %[uarg], %%eax\n"
-                
+
                 /* %edi is defined to hold pcb_ptr - set it to 0 */
                 "xorl %%edi, %%edi\n"
-                
+
                 "iret\n"
                 :
@@ -77 +77 @@
                   [vreg_des] "r" (GDT_SELECTOR(VREG_DES))
                 : "eax");
-        
+
         /* Unreachable */
         while (1);