Changeset 9a5b556 in mainline for kernel/arch/sparc64/src


Ignore:
Timestamp:
2006-09-12T13:03:55Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6eabb6e6
Parents:
7bb6b06
Message:

sparc64 work:

  • find a CPU node and read its clock_frequency attribute
  • implement asm_delay_loop()
  • set TICK_COMPARE register according to processor frequency
  • small improvements at random places

OpenFirmware work:

  • two new functions for walking the device tree

Generic boot loader work:

  • added basic string functions

Usual pile of indentation and formatting fixes.

Location:
kernel/arch/sparc64/src
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/cpu/cpu.c

    r7bb6b06 r9a5b556  
    3333 */
    3434
     35#include <arch/asm.h>
    3536#include <cpu.h>
    3637#include <arch.h>
    3738#include <arch/register.h>
    38 #include <arch/asm.h>
    3939#include <print.h>
     40#include <arch/boot/boot.h>
    4041
    4142void cpu_arch_init(void)
    4243{
     44        CPU->arch.clock_frequency = bootinfo.processor.clock_frequency;
    4345}
    4446
     
    9496        }
    9597
    96         printf("cpu%d: manuf=%s, impl=%s, mask=%d\n", CPU->id, manuf, impl, CPU->arch.ver.mask);
     98        printf("cpu%d: manuf=%s, impl=%s, mask=%d (%dMHz)\n",
     99                CPU->id, manuf, impl, CPU->arch.ver.mask, CPU->arch.clock_frequency/1000000);
    97100}
    98101
  • kernel/arch/sparc64/src/drivers/tick.c

    r7bb6b06 r9a5b556  
    3737#include <arch/asm.h>
    3838#include <arch/register.h>
     39#include <typedefs.h>
     40#include <arch/cpu.h>
     41#include <arch/boot/boot.h>
     42#include <time/clock.h>
     43#include <arch.h>
    3944#include <debug.h>
    40 #include <time/clock.h>
    41 #include <typedefs.h>
     45
     46#define TICK_RESTART_TIME       50      /* Worst case estimate. */
    4247
    4348/** Initialize tick interrupt. */
     
    4853        interrupt_register(14, "tick_int", tick_interrupt);
    4954        compare.int_dis = false;
    50         compare.tick_cmpr = TICK_DELTA;
     55        compare.tick_cmpr = bootinfo.processor.clock_frequency/HZ;
    5156        tick_compare_write(compare.value);
    5257        tick_write(0);
     
    6166{
    6267        softint_reg_t softint, clear;
     68        uint64_t next, compare, start, stop;
    6369       
    6470        softint.value = softint_read();
     
    8490         * Restart counter.
    8591         */
    86         tick_write(0);
     92        compare = CPU->arch.clock_frequency/HZ;
     93        start = tick_read();
     94        next = start - compare;
     95        while (next >= compare - TICK_RESTART_TIME) {
     96                next -= compare;
     97                CPU->missed_clock_ticks++;
     98        }
     99        stop = tick_read();
     100        tick_write(next + (stop - start));
    87101       
    88102        clock();
  • kernel/arch/sparc64/src/dummy.s

    r7bb6b06 r9a5b556  
    2929.text
    3030
    31 .global asm_delay_loop
    3231.global cpu_sleep
    3332.global fpu_context_restore
     
    3938.global dummy
    4039
    41 asm_delay_loop:
    4240cpu_sleep:
    4341fpu_context_restore:
  • kernel/arch/sparc64/src/sparc64.c

    r7bb6b06 r9a5b556  
    4343#include <arch/boot/boot.h>
    4444#include <arch/arch.h>
     45#include <arch/asm.h>
    4546#include <arch/mm/page.h>
    4647#include <arch/stack.h>
     
    9091}
    9192
     93/** Calibrate delay loop.
     94 *
     95 * On sparc64, we implement delay() by waiting for the TICK register to
     96 * reach a pre-computed value, as opposed to performing some pre-computed
     97 * amount of instructions of known duration. We set the delay_loop_const
     98 * to 1 in order to neutralize the multiplication done by delay().
     99 */
    92100void calibrate_delay_loop(void)
    93101{
     102        CPU->delay_loop_const = 1;
     103}
     104
     105/** Wait several microseconds.
     106 *
     107 * We assume that interrupts are already disabled.
     108 *
     109 * @param t Microseconds to wait.
     110 */
     111void asm_delay_loop(const uint32_t usec)
     112{
     113        uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t) CPU->arch.clock_frequency / 1000000;
     114
     115        while (tick_read() < stop)
     116                ;
    94117}
    95118
  • kernel/arch/sparc64/src/start.S

    r7bb6b06 r9a5b556  
    6161         */
    6262
    63         flushw                          ! flush all but the active register window
    64         wrpr %g0, 0, %tl                ! TL = 0, primary context register is used
    65 
    66         ! Disable interrupts and disable 32-bit address masking.
    67         rdpr %pstate, %g1
    68         and %g1, ~(PSTATE_AM_BIT|PSTATE_IE_BIT), %g1
    69         wrpr %g1, 0, %pstate
    70 
    71         wrpr %g0, 0, %pil               ! intialize %pil
     63        flushw                                  ! flush all but the active register window
     64
     65        wrpr %g0, 0, %tl                        ! TL = 0, primary context register is used
     66
     67        wrpr %g0, PSTATE_PRIV_BIT, %pstate      ! Disable interrupts and disable 32-bit address masking.
     68
     69        wrpr %g0, 0, %pil                       ! intialize %pil
    7270
    7371        /*
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