Changeset 9a5b556 in mainline for kernel/arch/sparc64/src/start.S


Ignore:
Timestamp:
2006-09-12T13:03:55Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6eabb6e6
Parents:
7bb6b06
Message:

sparc64 work:

  • find a CPU node and read its clock_frequency attribute
  • implement asm_delay_loop()
  • set TICK_COMPARE register according to processor frequency
  • small improvements at random places

OpenFirmware work:

  • two new functions for walking the device tree

Generic boot loader work:

  • added basic string functions

Usual pile of indentation and formatting fixes.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/start.S

    r7bb6b06 r9a5b556  
    6161         */
    6262
    63         flushw                          ! flush all but the active register window
    64         wrpr %g0, 0, %tl                ! TL = 0, primary context register is used
    65 
    66         ! Disable interrupts and disable 32-bit address masking.
    67         rdpr %pstate, %g1
    68         and %g1, ~(PSTATE_AM_BIT|PSTATE_IE_BIT), %g1
    69         wrpr %g1, 0, %pstate
    70 
    71         wrpr %g0, 0, %pil               ! intialize %pil
     63        flushw                                  ! flush all but the active register window
     64
     65        wrpr %g0, 0, %tl                        ! TL = 0, primary context register is used
     66
     67        wrpr %g0, PSTATE_PRIV_BIT, %pstate      ! Disable interrupts and disable 32-bit address masking.
     68
     69        wrpr %g0, 0, %pil                       ! intialize %pil
    7270
    7371        /*
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