source: mainline/kernel/arch/sparc64/src/cpu/cpu.c@ 9a5b556

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9a5b556 was 9a5b556, checked in by Jakub Jermar <jakub@…>, 19 years ago

sparc64 work:

  • find a CPU node and read its clock_frequency attribute
  • implement asm_delay_loop()
  • set TICK_COMPARE register according to processor frequency
  • small improvements at random places

OpenFirmware work:

  • two new functions for walking the device tree

Generic boot loader work:

  • added basic string functions

Usual pile of indentation and formatting fixes.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/asm.h>
36#include <cpu.h>
37#include <arch.h>
38#include <arch/register.h>
39#include <print.h>
40#include <arch/boot/boot.h>
41
42void cpu_arch_init(void)
43{
44 CPU->arch.clock_frequency = bootinfo.processor.clock_frequency;
45}
46
47void cpu_identify(void)
48{
49 CPU->arch.ver.value = ver_read();
50}
51
52void cpu_print_report(cpu_t *m)
53{
54 char *manuf, *impl;
55
56 switch (CPU->arch.ver.manuf) {
57 case MANUF_FUJITSU:
58 manuf = "Fujitsu";
59 break;
60 case MANUF_ULTRASPARC:
61 manuf = "UltraSPARC";
62 break;
63 case MANUF_SUN:
64 manuf = "Sun";
65 break;
66 default:
67 manuf = "Unknown";
68 break;
69 }
70
71 switch (CPU->arch.ver.impl) {
72 case IMPL_ULTRASPARCI:
73 impl = "UltraSPARC I";
74 break;
75 case IMPL_ULTRASPARCII:
76 impl = "UltraSPARC II";
77 break;
78 case IMPL_ULTRASPARCII_I:
79 impl = "UltraSPARC IIi";
80 break;
81 case IMPL_ULTRASPARCII_E:
82 impl = "UltraSPARC IIe";
83 break;
84 case IMPL_ULTRASPARCIII:
85 impl = "UltraSPARC III";
86 break;
87 case IMPL_ULTRASPARCIV_PLUS:
88 impl = "UltraSPARC IV+";
89 break;
90 case IMPL_SPARC64V:
91 impl = "SPARC 64V";
92 break;
93 default:
94 impl = "Unknown";
95 break;
96 }
97
98 printf("cpu%d: manuf=%s, impl=%s, mask=%d (%dMHz)\n",
99 CPU->id, manuf, impl, CPU->arch.ver.mask, CPU->arch.clock_frequency/1000000);
100}
101
102/** @}
103 */
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