Changeset 33b1903 in mainline for kernel/genarch/src/ofw/ebus.c

Timestamp:

2006-10-07T11:24:19Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8d4a577

Parents:

e2cc9a0

Message:

Separate mapping of EBUS interrupts into two parts: EBUS and PCI.

File:

• kernel/genarch/src/ofw/ebus.c (modified) (4 diffs)

kernel/genarch/src/ofw/ebus.c

@@ -37 +37 @@
 
 #include <genarch/ofw/ofw_tree.h>
-#include <arch/drivers/pci.h>
 #include <arch/memstr.h>
 #include <arch/trap/interrupt.h>
@@ -78 +77 @@
 }
 
-bool ofw_ebus_map_interrupts(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
+bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
 {
         ofw_tree_property_t *prop;
@@ -115 +114 @@
         /*
          * We found the device that functions as an interrupt controller
-         * for the interrupt. We also found mapping from interrupt to INR.
-         * What needs to be done now is to verify that this indeed is a PCI
-         * node.
+         * for the interrupt. We also found partial mapping from interrupt to INO.
          */
 
@@ -131 +128 @@
         }
 
-        pci_t *pci = controller->device;
-        if (!pci) {
-                pci = pci_init(controller);
-                if (!pci)
-                        return false;
-                controller->device = pci;
-                
-        }
-        pci_enable_interrupt(pci, intr_map[i].controller_inr);
+        /*
+         * Let the PCI do the next step in mapping the interrupt.
+         */
+        if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr))
+                return false;
 
-        *inr = intr_map[i].controller_inr;
-        *inr |= 0x1f << IGN_SHIFT;              /* 0x1f is hardwired IGN */
-        
         return true;
 }