source: mainline/kernel/genarch/src/ofw/ebus.c@ e2cc9a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e2cc9a0 was e2cc9a0, checked in by Jakub Jermar <jakub@…>, 19 years ago

Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers.

  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 * Copyright (C) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ofw
30 * @{
31 */
32/**
33 * @file
34 * @brief EBUS 'reg' and 'ranges' properties handling.
35 *
36 */
37
38#include <genarch/ofw/ofw_tree.h>
39#include <arch/drivers/pci.h>
40#include <arch/memstr.h>
41#include <arch/trap/interrupt.h>
42#include <func.h>
43#include <panic.h>
44#include <debug.h>
45#include <macros.h>
46
47/** Apply EBUS ranges to EBUS register. */
48bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
49{
50 ofw_tree_property_t *prop;
51 ofw_ebus_range_t *range;
52 count_t ranges;
53
54 prop = ofw_tree_getprop(node, "ranges");
55 if (!prop)
56 return false;
57
58 ranges = prop->size / sizeof(ofw_ebus_range_t);
59 range = prop->value;
60
61 int i;
62
63 for (i = 0; i < ranges; i++) {
64 if (reg->space != range[i].child_space)
65 continue;
66 if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
67 ofw_pci_reg_t pci_reg;
68
69 pci_reg.space = range[i].parent_space;
70 pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base);
71 pci_reg.size = reg->size;
72
73 return ofw_pci_apply_ranges(node->parent, &pci_reg, pa);
74 }
75 }
76
77 return false;
78}
79
80bool ofw_ebus_map_interrupts(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
81{
82 ofw_tree_property_t *prop;
83 ofw_tree_node_t *controller;
84
85 prop = ofw_tree_getprop(node, "interrupt-map");
86 if (!prop || !prop->value)
87 return false;
88
89 ofw_ebus_intr_map_t *intr_map = prop->value;
90 count_t count = prop->size / sizeof(ofw_ebus_intr_map_t);
91
92 ASSERT(count);
93
94 prop = ofw_tree_getprop(node, "interrupt-map-mask");
95 if (!prop || !prop->value)
96 return false;
97
98 ofw_ebus_intr_mask_t *intr_mask = prop->value;
99
100 ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t));
101
102 uint32_t space = reg->space & intr_mask->space_mask;
103 uint32_t addr = reg->addr & intr_mask->addr_mask;
104 uint32_t intr = interrupt & intr_mask->intr_mask;
105
106 int i;
107 for (i = 0; i < count; i++) {
108 if ((intr_map[i].space == space) && (intr_map[i].addr == addr)
109 && (intr_map[i].intr == intr))
110 goto found;
111 }
112 return false;
113
114found:
115 /*
116 * We found the device that functions as an interrupt controller
117 * for the interrupt. We also found mapping from interrupt to INR.
118 * What needs to be done now is to verify that this indeed is a PCI
119 * node.
120 */
121
122 controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle);
123 if (!controller)
124 return false;
125
126 if (strcmp(ofw_tree_node_name(controller), "pci") != 0) {
127 /*
128 * This is not a PCI node.
129 */
130 return false;
131 }
132
133 pci_t *pci = controller->device;
134 if (!pci) {
135 pci = pci_init(controller);
136 if (!pci)
137 return false;
138 controller->device = pci;
139
140 }
141 pci_enable_interrupt(pci, intr_map[i].controller_inr);
142
143 *inr = intr_map[i].controller_inr;
144 *inr |= 0x1f << IGN_SHIFT; /* 0x1f is hardwired IGN */
145
146 return true;
147}
148
149/** @}
150 */
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