Changeset e25eca80 in mainline for kernel/arch/ppc64/include/barrier.h


Ignore:
Timestamp:
2008-06-13T20:36:38Z (16 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d5087aa
Parents:
80dabb8d
Message:

Add smc_coherence() macro to all architectures.
So far, only amd64, ia32, ia64 and sparc64 are implemented.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ppc64/include/barrier.h

    r80dabb8d re25eca80  
    3939#define CS_LEAVE_BARRIER()      asm volatile ("" ::: "memory")
    4040
    41 #define memory_barrier() asm volatile ("sync" ::: "memory")
    42 #define read_barrier() asm volatile ("sync" ::: "memory")
    43 #define write_barrier() asm volatile ("eieio" ::: "memory")
     41#define memory_barrier()        asm volatile ("sync" ::: "memory")
     42#define read_barrier()          asm volatile ("sync" ::: "memory")
     43#define write_barrier()         asm volatile ("eieio" ::: "memory")
     44
     45#define smc_coherence(a)
    4446
    4547#endif
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