Changeset 99d6fd0 in mainline for kernel/arch/amd64/src/pm.c
- Timestamp:
- 2009-03-13T12:57:15Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 421c833
- Parents:
- 0160b1c8
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/pm.c
r0160b1c8 r99d6fd0 138 138 void gdt_tss_setlimit(descriptor_t *d, uint32_t limit) 139 139 { 140 struct tss_descriptor*td = (tss_descriptor_t *) d;141 140 tss_descriptor_t *td = (tss_descriptor_t *) d; 141 142 142 td->limit_0_15 = limit & 0xffff; 143 143 td->limit_16_19 = (limit >> 16) & 0xf; … … 186 186 void pm_init(void) 187 187 { 188 descriptor_t *gdt_p = ( struct descriptor*) gdtr.base;188 descriptor_t *gdt_p = (descriptor_t *) gdtr.base; 189 189 tss_descriptor_t *tss_desc; 190 190 191 191 /* 192 192 * Each CPU has its private GDT and TSS. 193 193 * All CPUs share one IDT. 194 194 */ 195 195 196 196 if (config.cpu_active == 1) { 197 197 idt_init(); … … 201 201 */ 202 202 tss_p = &tss; 203 } 204 else { 203 } else { 205 204 /* We are going to use malloc, which may return 206 205 * non boot-mapped pointer, initialize the CR3 register 207 206 * ahead of page_init */ 208 207 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); 209 210 tss_p = ( struct tss*) malloc(sizeof(tss_t), FRAME_ATOMIC);208 209 tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC); 211 210 if (!tss_p) 212 211 panic("Cannot allocate TSS."); 213 212 } 214 213 215 214 tss_initialize(tss_p); 216 215 217 216 tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]); 218 217 tss_desc->present = 1; … … 222 221 gdt_tss_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p); 223 222 gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1); 224 223 225 224 gdtr_load(&gdtr); 226 225 idtr_load(&idtr);
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