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Changeset 0160b1c8 in mainline


Ignore:
Timestamp:
2009-03-13T12:28:12Z (13 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master
Children:
99d6fd0
Parents:
afdce6eb
Message:

rename selector() to gdtselector() to unify with amd64

Location:
kernel/arch/ia32
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia32/include/pm.h

    rafdce6eb r0160b1c8  
    5959
    6060
    61 #define selector(des)   ((des) << 3)
     61#define gdtselector(des)        ((des) << 3)
    6262
    6363#define PL_KERNEL       0
  • kernel/arch/ia32/src/ddi/ddi.c

    rafdce6eb r0160b1c8  
    157157         */
    158158        gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
    159         tr_load(selector(TSS_DES));
     159        tr_load(gdtselector(TSS_DES));
    160160       
    161161        /*
  • kernel/arch/ia32/src/pm.c

    rafdce6eb r0160b1c8  
    128128
    129129                d->unused = 0;
    130                 d->selector = selector(KTEXT_DES);
     130                d->selector = gdtselector(KTEXT_DES);
    131131
    132132                d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
     
    215215         * to its own TSS. We just need to load the TR register.
    216216         */
    217         tr_load(selector(TSS_DES));
     217        tr_load(gdtselector(TSS_DES));
    218218       
    219219        clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */
  • kernel/arch/ia32/src/proc/scheduler.c

    rafdce6eb r0160b1c8  
    6666        /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
    6767        CPU->arch.tss->esp0 = kstk;
    68         CPU->arch.tss->ss0 = selector(KDATA_DES);
     68        CPU->arch.tss->ss0 = gdtselector(KDATA_DES);
    6969
    7070        /* Set up TLS in GS register */
  • kernel/arch/ia32/src/syscall.c

    rafdce6eb r0160b1c8  
    4545
    4646        /* set kernel mode CS selector */
    47         write_msr(IA32_MSR_SYSENTER_CS, selector(KTEXT_DES));
     47        write_msr(IA32_MSR_SYSENTER_CS, gdtselector(KTEXT_DES));
    4848        /* set kernel mode entry point */
    4949        write_msr(IA32_MSR_SYSENTER_EIP, (uint32_t) sysenter_handler);
  • kernel/arch/ia32/src/userspace.c

    rafdce6eb r0160b1c8  
    7575                "iret\n"
    7676                :
    77                 : [udata_des] "i" (selector(UDATA_DES) | PL_USER),
     77                : [udata_des] "i" (gdtselector(UDATA_DES) | PL_USER),
    7878                  [stack_size] "r" ((uint8_t *) kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
    7979                  [ipl] "r" (ipl),
    80                   [utext_des] "i" (selector(UTEXT_DES) | PL_USER),
     80                  [utext_des] "i" (gdtselector(UTEXT_DES) | PL_USER),
    8181                  [entry] "r" (kernel_uarg->uspace_entry),
    8282                  [uarg] "r" (kernel_uarg->uspace_uarg),
    83                   [tls_des] "r" (selector(TLS_DES))
     83                  [tls_des] "r" (gdtselector(TLS_DES))
    8484                : "eax");
    8585       
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