Ignore:
Timestamp:
2013-01-20T22:17:55Z (11 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
f03f107
Parents:
96228d0
Message:

amdm37x_dispc: Implement mode changing.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/fb/amdm37x_dispc/amdm37x_dispc_regs.h

    r96228d0 r7fa2031  
    4141#define AMDM37x_DISPC_SIZE 1024
    4242
    43 #include <assert.h>
    4443#include <macros.h>
    4544
     
    280279        ioport32_t vid_preload[2];
    281280
    282 } __attribute__((packed)) amdm37x_dispc_regs_t;
    283 
    284 static inline void amdm37x_dispc_setup_fb(amdm37x_dispc_regs_t *regs,
    285     unsigned x, unsigned y, unsigned bpp, uintptr_t pa)
    286 {
    287         assert(regs);
    288         /* Init sequence for dispc is in chapter 7.6.5.1.4 p. 1810,
    289          * no idea what parts of that work. */
    290 
    291         /* Disable all interrupts */
    292         regs->irqenable = 0;
    293 
    294         /* Pixel format specifics*/
    295         uint32_t attrib_pixel_format = 0;
    296         uint32_t control_data_lanes = 0;
    297         switch (bpp)
    298         {
    299         case 32:
    300                 attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGBX;
    301                 control_data_lanes = AMDM37X_DISPC_CONTROL_TFTDATALINES_24B;
    302                 break;
    303         case 24:
    304                 attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB24;
    305                 control_data_lanes = AMDM37X_DISPC_CONTROL_TFTDATALINES_24B;
    306                 break;
    307         case 16:
    308                 attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB16;
    309                 control_data_lanes = AMDM37X_DISPC_CONTROL_TFTDATALINES_16B;
    310                 break;
    311         default:
    312                 assert(false);
    313         }
    314 
    315         /* Prepare sizes */
    316         const uint32_t size_reg =
    317             (((x - 1) & AMDM37X_DISPC_SIZE_WIDTH_MASK)
    318                 << AMDM37X_DISPC_SIZE_WIDTH_SHIFT) |
    319             (((y - 1) & AMDM37X_DISPC_SIZE_HEIGHT_MASK)
    320                 << AMDM37X_DISPC_SIZE_HEIGHT_SHIFT);
    321 
    322         /* modes taken from u-boot, for 1024x768 */
    323         // TODO replace magic values with actual correct values
    324 //      regs->timing_h = 0x1a4024c9;
    325 //      regs->timing_v = 0x02c00509;
    326 //      regs->pol_freq = 0x00007028;
    327 //      regs->divisor  = 0x00010001;
    328 
    329         /* setup output */
    330         regs->size_lcd = size_reg;
    331         regs->size_dig = size_reg;
    332 
    333         /* Nice blue default color */
    334         regs->default_color[0] = 0x0000ff;
    335         regs->default_color[1] = 0x0000ff;
    336 
    337         /* Setup control register */
    338         uint32_t control = 0 |
    339                 AMDM37X_DISPC_CONTROL_PCKFREEENABLE_FLAG |
    340                 (control_data_lanes << AMDM37X_DISPC_CONTROL_TFTDATALINES_SHIFT) |
    341                 AMDM37X_DISPC_CONTROL_GPOUT0_FLAG |
    342                 AMDM37X_DISPC_CONTROL_GPOUT1_FLAG;
    343         regs->control = control;
    344 
    345         /* No gamma stuff only data */
    346         uint32_t config = (AMDM37X_DISPC_CONFIG_LOADMODE_DATAEVERYFRAME
    347                     << AMDM37X_DISPC_CONFIG_LOADMODE_SHIFT);
    348         regs->config = config;
    349 
    350 
    351         /* Set framebuffer base address */
    352         regs->gfx.ba[0] = pa;
    353         regs->gfx.ba[1] = pa;
    354         regs->gfx.position = 0;
    355 
    356         /* Setup fb size */
    357         regs->gfx.size = size_reg;
    358 
    359         /* Set pixel format */
    360         uint32_t attribs = 0 |
    361             (attrib_pixel_format << AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_SHIFT);
    362         regs->gfx.attributes = attribs;
    363 
    364         /* 0x03ff03c0 is the default */
    365         regs->gfx.fifo_threshold = 0x03ff03c0;
    366         /* This value should be stride - width, 1 means next pixel i.e.
    367          * stride == width */
    368         regs->gfx.row_inc = 1;
    369         /* number of bytes to next pixel in BPP multiples */
    370         regs->gfx.pixel_inc = 1;
    371         /* only used if video is played over fb */
    372         regs->gfx.window_skip = 0;
    373         /* Gamma and palette table */
    374         regs->gfx.table_ba = 0;
    375 
    376         /* enable frame buffer graphics */
    377         regs->gfx.attributes |= AMDM37X_DISPC_GFX_ATTRIBUTES_ENABLE_FLAG;
    378         /* Update register values */
    379         regs->control |= AMDM37X_DISPC_CONTROL_GOLCD_FLAG;
    380         regs->control |= AMDM37X_DISPC_CONTROL_GODIGITAL_FLAG;
    381         /* Enable output */
    382         regs->control |= AMDM37X_DISPC_CONTROL_LCD_ENABLE_FLAG;
    383         regs->control |= AMDM37X_DISPC_CONTROL_DIGITAL_ENABLE_FLAG;
    384 }
     281} amdm37x_dispc_regs_t;
     282
    385283
    386284#endif
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