Changeset 3d9d948 in mainline for kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c

Timestamp:

2010-07-27T20:13:05Z (14 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1720cf9

Parents:

a9b5b5f

Message:

Operate S3C24xx UART in FIFO mode.

File:

• kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c (modified) (4 diffs)

kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c

@@ -51 +51 @@
 #define S3C24XX_UTRSTAT_RDATA           0x1
 
+#define S3C24XX_UFSTAT_TX_FULL          0x4000
+#define S3C24XX_UFSTAT_RX_FULL          0x0040
+#define S3C24XX_UFSTAT_RX_COUNT         0x002f
+
 static void s3c24xx_uart_sendb(outdev_t *dev, uint8_t byte)
 {
@@ -56 +60 @@
             (s3c24xx_uart_t *) dev->data;
 
-        /* Wait for transmitter to be empty. */
-        while ((pio_read_32(&uart->io->utrstat) & S3C24XX_UTRSTAT_TX_EMPTY) == 0)
+        /* Wait for space becoming available in Tx FIFO. */
+        while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_TX_FULL) != 0)
                 ;
 
@@ -85 +89 @@
         s3c24xx_uart_t *uart = irq->instance;
 
-        if ((pio_read_32(&uart->io->utrstat) & S3C24XX_UTRSTAT_RDATA) != 0) {
+        while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) {
                 uint32_t data = pio_read_32(&uart->io->urxh);
+                pio_read_32(&uart->io->uerstat);
                 indev_push_character(uart->indev, data & 0xff);
         }
@@ -123 +128 @@
         uart->irq.instance = uart;
 
-        /* Disable FIFO */
-        pio_write_32(&uart->io->ufcon,
-            pio_read_32(&uart->io->ufcon) & ~0x01);
+        /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
+        pio_write_32(&uart->io->ufcon, 0x01);
 
         /* Set RX interrupt to pulse mode */