Changeset 296a80e in mainline for kernel/arch/arm32/include/arch/mm/page_armv6.h
- Timestamp:
- 2013-08-03T22:16:12Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 67d02bb
- Parents:
- 9120b69
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/arch/mm/page_armv6.h
r9120b69 r296a80e 205 205 p->ns = 0; 206 206 } 207 DCCMVAU_write((uint32_t)p); 207 DCCMVAC_write((uint32_t)p); 208 //TODO: DCCMVAU should be enough but it does not work. 208 209 } 209 210 … … 236 237 * tex=0 buf=1 and cache=0 => shareable device mmio 237 238 */ 238 p->cacheable = (flags & PAGE_CACHEABLE); 239 240 if (flags & PAGE_CACHEABLE) { 241 p->tex = 1; 242 p->cacheable = 1; 243 } else { 244 p->tex = 0; 245 p->cacheable = 0; 246 } 239 247 p->bufferable = 1; 240 p->tex = 0;241 248 242 249 /* Shareable is ignored for devices (non-cacheable), 243 250 * turn it on for normal memory. */ 244 p->shareable = 1;251 p->shareable = 0; 245 252 246 253 p->non_global = !(flags & PAGE_GLOBAL); … … 256 263 p->access_permission_1 = PTE_AP1_RO; 257 264 } 258 DCCMVAU_write((uint32_t)p); 265 DCCMVAC_write((uint32_t)p); 266 //TODO: DCCMVAU should be enough but it does not work. 259 267 } 260 268 … … 267 275 write_barrier(); 268 276 p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; 269 DCCMVAU_write((uint32_t)p); 277 DCCMVAC_write((uint32_t)p); 278 //TODO: DCCMVAU should be enough but it does not work. 270 279 } 271 280 … … 275 284 276 285 p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; 277 DCCMVAU_write((uint32_t)p); 286 DCCMVAC_write((uint32_t)p); 287 //TODO: DCCMVAU should be enough but it does not work. 278 288 } 279 289
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