Changeset 0dc2fec in mainline for kernel/arch/ia32/include/arch/cpu.h

Timestamp:

2016-05-22T19:19:43Z (8 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

b272c67a

Parents:

153c7a29 (diff), af2254ec (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes

File:

• kernel/arch/ia32/include/arch/cpu.h (modified) (1 diff)

kernel/arch/ia32/include/arch/cpu.h

@@ -36 +36 @@
 #define KERN_ia32_CPU_H_
 
-#define EFLAGS_IF       (1 << 9)
-#define EFLAGS_DF       (1 << 10)
-#define EFLAGS_NT       (1 << 14)
-#define EFLAGS_RF       (1 << 16)
+#define EFLAGS_IF       (1 << 9)
+#define EFLAGS_DF       (1 << 10)
+#define EFLAGS_IOPL     (3 << 12)
+#define EFLAGS_NT       (1 << 14)
+#define EFLAGS_RF       (1 << 16)
+#define EFLAGS_ID       (1 << 21)
 
-#define CR4_OSFXSR_MASK      (1 << 9)
-#define CR4_OSXMMEXCPT_MASK  (1 << 10)
+#define CR0_PE          (1 << 0) 
+#define CR0_TS          (1 << 3)
+#define CR0_AM          (1 << 18)
+#define CR0_NW          (1 << 29)
+#define CR0_CD          (1 << 30)
+#define CR0_PG          (1 << 31)
+
+#define CR4_PSE         (1 << 4)
+#define CR4_PAE         (1 << 5)
+#define CR4_OSFXSR      (1 << 9)
+#define CR4_OSXMMEXCPT  (1 << 10)
+
+#define IA32_APIC_BASE_GE       (1 << 11)
+
+#define IA32_MSR_APIC_BASE      0x01b
 
 /* Support for SYSENTER and SYSEXIT */
-#define IA32_MSR_SYSENTER_CS   0x174U
-#define IA32_MSR_SYSENTER_ESP  0x175U
-#define IA32_MSR_SYSENTER_EIP  0x176U
+#define IA32_MSR_SYSENTER_CS    0x174
+#define IA32_MSR_SYSENTER_ESP   0x175
+#define IA32_MSR_SYSENTER_EIP   0x176
 
 #ifndef __ASM__