Changeset 0f17bff in mainline for kernel/arch/ia32/include/arch/cpu.h
- Timestamp:
- 2016-05-05T08:34:45Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 811770c
- Parents:
- 4b0206c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/arch/cpu.h
r4b0206c r0f17bff 36 36 #define KERN_ia32_CPU_H_ 37 37 38 #define EFLAGS_IF (1 << 9) 39 #define EFLAGS_DF (1 << 10) 40 #define EFLAGS_NT (1 << 14) 41 #define EFLAGS_RF (1 << 16) 38 #define EFLAGS_IF (1 << 9) 39 #define EFLAGS_DF (1 << 10) 40 #define EFLAGS_IOPL (3 << 12) 41 #define EFLAGS_NT (1 << 14) 42 #define EFLAGS_RF (1 << 16) 42 43 43 #define CR4_OSFXSR_MASK (1 << 9) 44 #define CR4_OSXMMEXCPT_MASK (1 << 10) 44 #define CR0_AM (1 << 18) 45 #define CR0_NW (1 << 29) 46 #define CR0_CD (1 << 30) 47 #define CR0_PG (1 << 31) 48 49 #define CR4_OSFXSR_MASK (1 << 9) 50 #define CR4_OSXMMEXCPT_MASK (1 << 10) 51 52 #define IA32_APIC_BASE_GE (1 << 11) 53 54 #define IA32_MSR_APIC_BASE 0x01b 45 55 46 56 /* Support for SYSENTER and SYSEXIT */ 47 #define IA32_MSR_SYSENTER_CS 0x174U48 #define IA32_MSR_SYSENTER_ESP 0x175U49 #define IA32_MSR_SYSENTER_EIP 0x176U57 #define IA32_MSR_SYSENTER_CS 0x174 58 #define IA32_MSR_SYSENTER_ESP 0x175 59 #define IA32_MSR_SYSENTER_EIP 0x176 50 60 51 61 #ifndef __ASM__
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