Changeset ffc277e in mainline for arch/mips/src/exception.c
- Timestamp:
- 2005-09-10T00:52:13Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f3a6c8e5
- Parents:
- b02e5d1
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips/src/exception.c
rb02e5d1 rffc277e 52 52 cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | 53 53 cp0_status_um_bit)); 54 /* Save pstate so that the threads can access it */ 55 if (THREAD) 56 THREAD->pstate = pstate; 54 57 55 58 /* decode exception number and process the exception */ … … 86 89 break; 87 90 case EXC_CpU: 91 #ifdef FPU_LAZY 92 scheduler_fpu_lazy_request(); 93 #else 88 94 panic("unhandled Coprocessor Unusable Exception\n"); 95 #endif 89 96 break; 90 97 case EXC_Ov: … … 111 118 112 119 pstate->epc += epc_shift; 120 /* Probable not needed, but just for sure that nobody 121 * will continue accessing it */ 122 if (THREAD) 123 THREAD->pstate = NULL; 113 124 }
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