Changeset e2cc9a0 in mainline for kernel/genarch/src


Ignore:
Timestamp:
2006-10-06T22:37:15Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
33b1903
Parents:
233af8c5
Message:

Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers.

Location:
kernel/genarch/src
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • kernel/genarch/src/kbd/ns16550.c

    r233af8c5 re2cc9a0  
    9191        sysinfo_set_item_val("kbd.irq", NULL, 0);
    9292        sysinfo_set_item_val("kbd.address.virtual", NULL, (uintptr_t) kbd_virt_address);
     93       
     94        ns16550_ier_write(IER_ERBFI);                           /* enable receiver interrupt */
     95       
     96        while (ns16550_lsr_read() & LSR_DATA_READY)
     97                (void) ns16550_rbr_read();
    9398}
    9499
     
    145150        uint8_t x;
    146151
    147         while (((x = ns16550_lsr_read() & LSR_DATA_READY))) {
     152        while (ns16550_lsr_read() & LSR_DATA_READY) {
    148153                x = ns16550_rbr_read();
    149154                if (x != IGNORE_CODE) {
  • kernel/genarch/src/ofw/ebus.c

    r233af8c5 re2cc9a0  
    3737
    3838#include <genarch/ofw/ofw_tree.h>
     39#include <arch/drivers/pci.h>
    3940#include <arch/memstr.h>
     41#include <arch/trap/interrupt.h>
    4042#include <func.h>
    4143#include <panic.h>
     
    4345#include <macros.h>
    4446
     47/** Apply EBUS ranges to EBUS register. */
    4548bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
    4649{
     
    113116         * We found the device that functions as an interrupt controller
    114117         * for the interrupt. We also found mapping from interrupt to INR.
     118         * What needs to be done now is to verify that this indeed is a PCI
     119         * node.
    115120         */
    116121
    117122        controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle);
     123        if (!controller)
     124                return false;
     125               
     126        if (strcmp(ofw_tree_node_name(controller), "pci") != 0) {
     127                /*
     128                 * This is not a PCI node.
     129                 */
     130                return false;
     131        }
     132
     133        pci_t *pci = controller->device;
     134        if (!pci) {
     135                pci = pci_init(controller);
     136                if (!pci)
     137                        return false;
     138                controller->device = pci;
     139               
     140        }
     141        pci_enable_interrupt(pci, intr_map[i].controller_inr);
     142
     143        *inr = intr_map[i].controller_inr;
     144        *inr |= 0x1f << IGN_SHIFT;              /* 0x1f is hardwired IGN */
    118145       
    119         *inr = intr_map[i].controller_inr;
    120146        return true;
    121147}
  • kernel/genarch/src/ofw/upa.c

    r233af8c5 re2cc9a0  
    4646{
    4747        *pa = reg->addr;
    48         return false;
     48        return true;
    4949}
    5050
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