Changeset dd0c8a0 in mainline for kernel/genarch/src


Ignore:
Timestamp:
2013-09-29T06:56:33Z (12 years ago)
Author:
Beniamino Galvani <b.galvani@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a9bd960d
Parents:
3deb0155 (diff), 13be2583 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/genarch/src
Files:
1 deleted
3 edited
1 moved

Legend:

Unmodified
Added
Removed

  • kernel/genarch/src/drivers/am335x/timer.c

    r3deb0155 rdd0c8a0  
    119119        /* Disable compare mode */
    120120        tclr &= ~AM335x_TIMER_TCLR_CE_FLAG;
    121         /* Enable the prescaler, divisor = 2 */
    122         tclr |= AM335x_TIMER_TCLR_PRE_FLAG;
    123         tclr &= ~(AM335x_TIMER_TCLR_PTV_MASK << AM335x_TIMER_TCLR_PTV_SHIFT);
     121
    124122        /* Enable auto-reload mode */
    125123        tclr |= AM335x_TIMER_TCLR_AR_FLAG;

  • kernel/genarch/src/drivers/omap/uart.c

    r3deb0155 rdd0c8a0  
    3232/**
    3333 * @file
    34  * @brief Texas Instruments AM335x on-chip uart serial line driver.
     34 * @brief Texas Instruments OMAP on-chip uart serial line driver.
    3535 */
    3636
    37 #include <genarch/drivers/am335x/uart.h>
     37#include <genarch/drivers/omap/uart.h>
    3838#include <ddi/device.h>
    3939#include <str.h>
    4040#include <mm/km.h>
    4141
    42 static void am335x_uart_txb(am335x_uart_t *uart, uint8_t b)
     42static void omap_uart_txb(omap_uart_t *uart, uint8_t b)
    4343{
    4444        /* Wait for buffer */
    45         while (uart->regs->ssr & AM335x_UART_SSR_TX_FIFO_FULL_FLAG);
     45        while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG);
    4646        /* Write to the outgoing fifo */
    4747        uart->regs->thr = b;
    4848}
    4949
    50 static void am335x_uart_putchar(outdev_t *dev, wchar_t ch)
     50static void omap_uart_putchar(outdev_t *dev, wchar_t ch)
    5151{
    52         am335x_uart_t *uart = dev->data;
     52        omap_uart_t *uart = dev->data;
    5353        if (!ascii_check(ch)) {
    54                 am335x_uart_txb(uart, U_SPECIAL);
     54                omap_uart_txb(uart, U_SPECIAL);
    5555        } else {
    5656                if (ch == '\n')
    57                         am335x_uart_txb(uart, '\r');
    58                 am335x_uart_txb(uart, ch);
     57                        omap_uart_txb(uart, '\r');
     58                omap_uart_txb(uart, ch);
    5959        }
    6060}
    6161
    62 static outdev_operations_t am335x_uart_ops = {
     62static outdev_operations_t omap_uart_ops = {
    6363        .redraw = NULL,
    64         .write = am335x_uart_putchar,
     64        .write = omap_uart_putchar,
    6565};
    6666
    67 static irq_ownership_t am335x_uart_claim(irq_t *irq)
     67static irq_ownership_t omap_uart_claim(irq_t *irq)
    6868{
    6969        return IRQ_ACCEPT;
    7070}
    7171
    72 static void am335x_uart_handler(irq_t *irq)
     72static void omap_uart_handler(irq_t *irq)
    7373{
    74         am335x_uart_t *uart = irq->instance;
     74        omap_uart_t *uart = irq->instance;
    7575        while ((uart->regs->rx_fifo_lvl)) {
    7676                const uint8_t val = uart->regs->rhr;
    … …  
    8181}
    8282
    83 bool am335x_uart_init(
    84     am335x_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
     83bool omap_uart_init(
     84    omap_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
    8585{
    8686        ASSERT(uart);
    … …  
    9090
    9191        /* Soft reset the port */
    92         uart->regs->sysc = AM335x_UART_SYSC_SOFTRESET_FLAG;
    93         while (!(uart->regs->syss & AM335x_UART_SYSS_RESETDONE_FLAG));
     92        uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG;
     93        while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG));
    9494
    9595        /* Disable the UART module */
    96         uart->regs->mdr1 |= AM335x_UART_MDR_MS_DISABLE;
     96        uart->regs->mdr1 |= OMAP_UART_MDR_MS_DISABLE;
    9797
    9898        /* Enable access to EFR register */
    … …  
    100100
    101101        /* Enable access to TCL_TLR register */
    102         const bool enhanced = uart->regs->efr & AM335x_UART_EFR_ENH_FLAG;
    103         uart->regs->efr |= AM335x_UART_EFR_ENH_FLAG; /* Turn on enh. */
     102        const bool enhanced = uart->regs->efr & OMAP_UART_EFR_ENH_FLAG;
     103        uart->regs->efr |= OMAP_UART_EFR_ENH_FLAG; /* Turn on enh. */
    104104        uart->regs->lcr = 0x80;              /* Config mode A */
    105105
    106106        /* Set default (val 0) triggers, disable DMA enable FIFOs */
    107         const bool tcl_tlr = uart->regs->mcr & AM335x_UART_MCR_TCR_TLR_FLAG;
     107        const bool tcl_tlr = uart->regs->mcr & OMAP_UART_MCR_TCR_TLR_FLAG;
    108108        /* Enable access to tcr and tlr registers */
    109         uart->regs->mcr |= AM335x_UART_MCR_TCR_TLR_FLAG;
     109        uart->regs->mcr |= OMAP_UART_MCR_TCR_TLR_FLAG;
    110110
    111111        /* Enable FIFOs */
    112         uart->regs->fcr = AM335x_UART_FCR_FIFO_EN_FLAG;
     112        uart->regs->fcr = OMAP_UART_FCR_FIFO_EN_FLAG;
    113113
    114114        /* Enable fine granularity for RX FIFO and set trigger level to 1,
    115115         * TX FIFO, trigger level is irrelevant*/
    116116        uart->regs->lcr = 0xBF;              /* Sets config mode B */
    117         uart->regs->scr = AM335x_UART_SCR_RX_TRIG_GRANU1_FLAG;
    118         uart->regs->tlr = 1 << AM335x_UART_TLR_RX_FIFO_TRIG_SHIFT;
     117        uart->regs->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_FLAG;
     118        uart->regs->tlr = 1 << OMAP_UART_TLR_RX_FIFO_TRIG_SHIFT;
    119119
    120120        /* Sets config mode A */
    … …  
    122122        /* Restore tcl_tlr access flag */
    123123        if (!tcl_tlr)
    124                 uart->regs->mcr &= ~AM335x_UART_MCR_TCR_TLR_FLAG;
     124                uart->regs->mcr &= ~OMAP_UART_MCR_TCR_TLR_FLAG;
    125125        /* Sets config mode B */
    126126        uart->regs->lcr = 0xBF;
    … …  
    132132        /* Restore enhanced */
    133133        if (!enhanced)
    134                 uart->regs->efr &= ~AM335x_UART_EFR_ENH_FLAG;
     134                uart->regs->efr &= ~OMAP_UART_EFR_ENH_FLAG;
    135135
    136136        /* Set the DIV_EN bit to 0 */
    137         uart->regs->lcr &= ~AM335x_UART_LCR_DIV_EN_FLAG;
     137        uart->regs->lcr &= ~OMAP_UART_LCR_DIV_EN_FLAG;
    138138        /* Set the BREAK_EN bit to 0 */
    139         uart->regs->lcr &= ~AM335x_UART_LCR_BREAK_EN_FLAG;
     139        uart->regs->lcr &= ~OMAP_UART_LCR_BREAK_EN_FLAG;
    140140        /* No parity */
    141         uart->regs->lcr &= ~AM335x_UART_LCR_PARITY_EN_FLAG;
     141        uart->regs->lcr &= ~OMAP_UART_LCR_PARITY_EN_FLAG;
    142142        /* Stop = 1 bit */
    143         uart->regs->lcr &= ~AM335x_UART_LCR_NB_STOP_FLAG;
     143        uart->regs->lcr &= ~OMAP_UART_LCR_NB_STOP_FLAG;
    144144        /* Char length = 8 bits */
    145         uart->regs->lcr |= AM335x_UART_LCR_CHAR_LENGTH_8BITS;
     145        uart->regs->lcr |= OMAP_UART_LCR_CHAR_LENGTH_8BITS;
    146146
    147147        /* Enable the UART module */
    148         uart->regs->mdr1 &= (AM335x_UART_MDR_MS_UART16 &
    149             ~AM335x_UART_MDR_MS_MASK);
     148        uart->regs->mdr1 &= (OMAP_UART_MDR_MS_UART16 &
     149            ~OMAP_UART_MDR_MS_MASK);
    150150
    151151        /* Disable interrupts */
    … …  
    153153
    154154        /* Setup outdev */
    155         outdev_initialize("am335x_uart_dev", &uart->outdev, &am335x_uart_ops);
     155        outdev_initialize("omap_uart_dev", &uart->outdev, &omap_uart_ops);
    156156        uart->outdev.data = uart;
    157157
    … …  
    160160        uart->irq.devno = device_assign_devno();
    161161        uart->irq.inr = interrupt;
    162         uart->irq.claim = am335x_uart_claim;
    163         uart->irq.handler = am335x_uart_handler;
     162        uart->irq.claim = omap_uart_claim;
     163        uart->irq.handler = omap_uart_handler;
    164164        uart->irq.instance = uart;
    165165
    … …  
    167167}
    168168
    169 void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev)
     169void omap_uart_input_wire(omap_uart_t *uart, indev_t *indev)
    170170{
    171171        ASSERT(uart);
    … …  
    175175        irq_register(&uart->irq);
    176176        /* Enable interrupt on receive */
    177         uart->regs->ier |= AM335x_UART_IER_RHR_IRQ_FLAG;
     177        uart->regs->ier |= OMAP_UART_IER_RHR_IRQ_FLAG;
    178178}
    179179

  • kernel/genarch/src/mm/as_pt.c

    r3deb0155 rdd0c8a0  
    7373pte_t *ptl0_create(unsigned int flags)
    7474{
    75         pte_t *dst_ptl0 = (pte_t *) frame_alloc(PTL0_SIZE,
    76             FRAME_LOWMEM | FRAME_KA);
    77         size_t table_size = FRAME_SIZE << PTL0_SIZE;
     75        pte_t *dst_ptl0 = (pte_t *)
     76            PA2KA(frame_alloc(PTL0_FRAMES, FRAME_LOWMEM, PTL0_SIZE - 1));
    7877       
    7978        if (flags & FLAG_AS_KERNEL)
    80                 memsetb(dst_ptl0, table_size, 0);
     79                memsetb(dst_ptl0, PTL0_SIZE, 0);
    8180        else {
    8281                /*
    8382                 * Copy the kernel address space portion to new PTL0.
    84                  *
    8583                 */
    8684               
    … …  
    9593                    &dst_ptl0[PTL0_INDEX(KERNEL_ADDRESS_SPACE_START)];
    9694               
    97                 memsetb(dst_ptl0, table_size, 0);
     95                memsetb(dst_ptl0, PTL0_SIZE, 0);
    9896                memcpy((void *) dst, (void *) src,
    99                     table_size - (src - (uintptr_t) src_ptl0));
     97                    PTL0_SIZE - (src - (uintptr_t) src_ptl0));
    10098               
    10199                mutex_unlock(&AS_KERNEL->lock);
    … …  
    114112void ptl0_destroy(pte_t *page_table)
    115113{
    116         frame_free((uintptr_t) page_table);
     114        frame_free((uintptr_t) page_table, PTL0_FRAMES);
    117115}
    118116

  • kernel/genarch/src/mm/page_pt.c

    r3deb0155 rdd0c8a0  
    8282       
    8383        if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
    84                 pte_t *newpt = (pte_t *) frame_alloc(PTL1_SIZE,
    85                     FRAME_LOWMEM | FRAME_KA);
    86                 memsetb(newpt, FRAME_SIZE << PTL1_SIZE, 0);
     84                pte_t *newpt = (pte_t *)
     85                    PA2KA(frame_alloc(PTL1_FRAMES, FRAME_LOWMEM, PTL1_SIZE - 1));
     86                memsetb(newpt, PTL1_SIZE, 0);
    8787                SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
    8888                SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page),
    … …  
    101101       
    102102        if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
    103                 pte_t *newpt = (pte_t *) frame_alloc(PTL2_SIZE,
    104                     FRAME_LOWMEM | FRAME_KA);
    105                 memsetb(newpt, FRAME_SIZE << PTL2_SIZE, 0);
     103                pte_t *newpt = (pte_t *)
     104                    PA2KA(frame_alloc(PTL2_FRAMES, FRAME_LOWMEM, PTL2_SIZE - 1));
     105                memsetb(newpt, PTL2_SIZE, 0);
    106106                SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
    107107                SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page),
    … …  
    112112                 */
    113113                write_barrier();
    114                 SET_PTL2_PRESENT(ptl1, PTL1_INDEX(page));       
     114                SET_PTL2_PRESENT(ptl1, PTL1_INDEX(page));
    115115        }
    116116       
    … …  
    118118       
    119119        if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
    120                 pte_t *newpt = (pte_t *) frame_alloc(PTL3_SIZE,
    121                     FRAME_LOWMEM | FRAME_KA);
    122                 memsetb(newpt, FRAME_SIZE << PTL3_SIZE, 0);
     120                pte_t *newpt = (pte_t *)
     121                    PA2KA(frame_alloc(PTL3_FRAMES, FRAME_LOWMEM, PTL2_SIZE - 1));
     122                memsetb(newpt, PTL2_SIZE, 0);
    123123                SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
    124124                SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page),
    … …  
    180180         * Destroy the mapping.
    181181         * Setting to PAGE_NOT_PRESENT is not sufficient.
    182          */
     182         * But we need SET_FRAME for possible PT coherence maintenance.
     183         * At least on ARM.
     184         */
     185        //TODO: Fix this inconsistency
     186        SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), PAGE_NOT_PRESENT);
    183187        memsetb(&ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
    184188       
    … …  
    215219                memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
    216220#endif
    217                 frame_free(KA2PA((uintptr_t) ptl3));
     221                frame_free(KA2PA((uintptr_t) ptl3), PTL3_FRAMES);
    218222        } else {
    219223                /*
    … …  
    249253                memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
    250254#endif
    251                 frame_free(KA2PA((uintptr_t) ptl2));
     255                frame_free(KA2PA((uintptr_t) ptl2), PTL2_FRAMES);
    252256        } else {
    253257                /*
    … …  
    280284
    281285                memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
    282                 frame_free(KA2PA((uintptr_t) ptl1));
     286                frame_free(KA2PA((uintptr_t) ptl1), PTL1_FRAMES);
    283287        }
    284288#endif /* PTL1_ENTRIES != 0 */
    … …  
    359363 * @param size Size in bytes defining the range of PTL0 entries that will be
    360364 *             altered by this function.
     365 *
    361366 */
    362367void pt_mapping_make_global(uintptr_t base, size_t size)
    363368{
     369        ASSERT(size > 0);
     370       
    364371        uintptr_t ptl0 = PA2KA((uintptr_t) AS_KERNEL->genarch.page_table);
    365372        uintptr_t ptl0_step = ptl0_step_get();
    366         size_t order;
    367         uintptr_t addr;
    368 
     373        size_t frames;
     374       
    369375#if (PTL1_ENTRIES != 0)
    370         order = PTL1_SIZE;
     376        frames = PTL1_FRAMES;
    371377#elif (PTL2_ENTRIES != 0)
    372         order = PTL2_SIZE;
     378        frames = PTL2_FRAMES;
    373379#else
    374         order = PTL3_SIZE;
    375 #endif
    376 
    377         ASSERT(size > 0);
    378 
    379         for (addr = ALIGN_DOWN(base, ptl0_step); addr - 1 < base + size - 1;
     380        frames = PTL3_FRAMES;
     381#endif
     382       
     383        for (uintptr_t addr = ALIGN_DOWN(base, ptl0_step);
     384            addr - 1 < base + size - 1;
    380385            addr += ptl0_step) {
    381                 uintptr_t l1;
    382 
    383                 l1 = (uintptr_t) frame_alloc(order, FRAME_KA | FRAME_LOWMEM);
    384                 memsetb((void *) l1, FRAME_SIZE << order, 0);
     386                uintptr_t l1 = PA2KA(frame_alloc(frames, FRAME_LOWMEM, 0));
     387                memsetb((void *) l1, FRAMES2SIZE(frames), 0);
    385388                SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1));
    386389                SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr),
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