Changeset da68871a in mainline for kernel/arch
- Timestamp:
- 2012-08-08T08:46:22Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 30c0826
- Parents:
- bc216a0 (diff), 1d01cca (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch
- Files:
-
- 22 edited
-
abs32le/include/mm/page.h (modified) (2 diffs)
-
amd64/include/mm/page.h (modified) (2 diffs)
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amd64/src/asm.S (modified) (2 diffs)
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amd64/src/boot/multiboot.S (modified) (3 diffs)
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amd64/src/boot/multiboot2.S (modified) (2 diffs)
-
amd64/src/boot/vesa_ret.inc (modified) (1 diff)
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amd64/src/mm/page.c (modified) (1 diff)
-
arm32/include/mm/page.h (modified) (5 diffs)
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ia32/include/mm/page.h (modified) (2 diffs)
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ia32/src/boot/multiboot.S (modified) (3 diffs)
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ia32/src/boot/multiboot2.S (modified) (2 diffs)
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ia32/src/boot/vesa_prot.inc (modified) (1 diff)
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ia32/src/boot/vesa_real.inc (modified) (1 diff)
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ia32/src/boot/vesa_ret.inc (modified) (1 diff)
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ia32/src/mm/page.c (modified) (1 diff)
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ia32/src/smp/apic.c (modified) (7 diffs)
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ia64/Makefile.inc (modified) (1 diff)
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mips32/Makefile.inc (modified) (2 diffs)
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mips32/include/mm/page.h (modified) (2 diffs)
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mips64/Makefile.inc (modified) (2 diffs)
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ppc32/include/mm/page.h (modified) (2 diffs)
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sparc64/src/smp/sun4u/ipi.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/abs32le/include/mm/page.h
rbc216a0 rda68871a 105 105 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) 106 106 107 /* Set PTE present bit accessors for each level. */ 108 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 109 set_pt_present((pte_t *) (ptl0), (size_t) (i)) 110 #define SET_PTL2_PRESENT_ARCH(ptl1, i) 111 #define SET_PTL3_PRESENT_ARCH(ptl2, i) 112 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 113 set_pt_present((pte_t *) (ptl3), (size_t) (i)) 114 107 115 /* Macros for querying the last level entries. */ 108 116 #define PTE_VALID_ARCH(p) \ … … 173 181 } 174 182 183 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 184 WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) 185 REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) 186 { 187 pte_t *p = &pt[i]; 188 189 p->present = 1; 190 } 191 175 192 extern void page_arch_init(void); 176 193 extern void page_fault(unsigned int, istate_t *); -
kernel/arch/amd64/include/mm/page.h
rbc216a0 rda68871a 119 119 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) 120 120 121 /* Set PTE present bit accessors for each level. */ 122 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 123 set_pt_present((pte_t *) (ptl0), (size_t) (i)) 124 #define SET_PTL2_PRESENT_ARCH(ptl1, i) \ 125 set_pt_present((pte_t *) (ptl1), (size_t) (i)) 126 #define SET_PTL3_PRESENT_ARCH(ptl2, i) \ 127 set_pt_present((pte_t *) (ptl2), (size_t) (i)) 128 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 129 set_pt_present((pte_t *) (ptl3), (size_t) (i)) 130 121 131 /* Macros for querying the last-level PTE entries. */ 122 132 #define PTE_VALID_ARCH(p) \ … … 215 225 } 216 226 227 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 228 { 229 pte_t *p = &pt[i]; 230 231 p->present = 1; 232 } 233 217 234 extern void page_arch_init(void); 218 235 extern void page_fault(unsigned int, istate_t *); -
kernel/arch/amd64/src/asm.S
rbc216a0 rda68871a 362 362 */ 363 363 call syscall_handler 364 364 365 /* 366 * Test if the saved return address is canonical and not-kernel. 367 * We do this by looking at the 16 most significant bits 368 * of the saved return address (two bytes at offset 6). 369 */ 370 testw $0xffff, ISTATE_OFFSET_RIP+6(%rsp) 371 jnz bad_rip 372 365 373 cli 366 374 … … 388 396 sysretq 389 397 398 bad_rip: 399 movq %rsp, %rdi 400 movabs $bad_rip_msg, %rsi 401 xorb %al, %al 402 callq fault_from_uspace 403 /* not reached */ 404 405 bad_rip_msg: 406 .asciz "Invalid instruction pointer." 407 390 408 /** Print Unicode character to EGA display. 391 409 * -
kernel/arch/amd64/src/boot/multiboot.S
rbc216a0 rda68871a 76 76 77 77 multiboot_image_start: 78 cli 78 79 cld 79 80 … … 81 82 movl $START_STACK, %esp 82 83 83 /* Initialize Global Descriptor Table register */ 84 /* 85 * Initialize Global Descriptor Table and 86 * Interrupt Descriptor Table registers 87 */ 84 88 lgdtl bootstrap_gdtr 89 lidtl bootstrap_idtr 85 90 86 91 /* Kernel data + stack */ … … 645 650 .section K_DATA_START, "aw", @progbits 646 651 652 .global bootstrap_idtr 653 bootstrap_idtr: 654 .word 0 655 .long 0 656 647 657 .global bootstrap_gdtr 648 658 bootstrap_gdtr: -
kernel/arch/amd64/src/boot/multiboot2.S
rbc216a0 rda68871a 116 116 117 117 multiboot2_image_start: 118 cli 118 119 cld 119 120 … … 121 122 movl $START_STACK, %esp 122 123 123 /* Initialize Global Descriptor Table register */ 124 /* 125 * Initialize Global Descriptor Table and 126 * Interrupt Descriptor Table registers 127 */ 124 128 lgdtl bootstrap_gdtr 129 lidtl bootstrap_idtr 125 130 126 131 /* Kernel data + stack */ -
kernel/arch/amd64/src/boot/vesa_ret.inc
rbc216a0 rda68871a 1 1 .code32 2 2 vesa_init_protected: 3 cli 3 4 cld 4 5 -
kernel/arch/amd64/src/mm/page.c
rbc216a0 rda68871a 57 57 uintptr_t cur; 58 58 unsigned int identity_flags = 59 PAGE_ CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;59 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ; 60 60 61 61 page_mapping_operations = &pt_mapping_operations; -
kernel/arch/arm32/include/mm/page.h
rbc216a0 rda68871a 40 40 #include <mm/mm.h> 41 41 #include <arch/exception.h> 42 #include <arch/barrier.h> 42 43 #include <trace.h> 43 44 … … 109 110 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ 110 111 set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) 112 113 /* Set PTE present bit accessors for each level. */ 114 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 115 set_pt_level0_present((pte_t *) (ptl0), (size_t) (i)) 116 #define SET_PTL2_PRESENT_ARCH(ptl1, i) 117 #define SET_PTL3_PRESENT_ARCH(ptl2, i) 118 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 119 set_pt_level1_present((pte_t *) (ptl3), (size_t) (i)) 111 120 112 121 /* Macros for querying the last-level PTE entries. */ … … 267 276 } 268 277 278 NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) 279 { 280 pte_level0_t *p = &pt[i].l0; 281 282 p->should_be_zero = 0; 283 write_barrier(); 284 p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; 285 } 269 286 270 287 /** Sets flags of level 1 page table entry. … … 283 300 pte_level1_t *p = &pt[i].l1; 284 301 285 if (flags & PAGE_NOT_PRESENT) {302 if (flags & PAGE_NOT_PRESENT) 286 303 p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; 287 p->access_permission_3 = 1; 288 } else { 304 else 289 305 p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; 290 p->access_permission_3 = p->access_permission_0;291 }292 306 293 307 p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; … … 312 326 } 313 327 314 328 NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) 329 { 330 pte_level1_t *p = &pt[i].l1; 331 332 p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; 333 } 334 315 335 extern void page_arch_init(void); 316 336 317 318 337 #endif /* __ASM__ */ 319 338 -
kernel/arch/ia32/include/mm/page.h
rbc216a0 rda68871a 115 115 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) 116 116 117 /* Set PTE present bit accessors for each level. */ 118 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 119 set_pt_present((pte_t *) (ptl0), (size_t) (i)) 120 #define SET_PTL2_PRESENT_ARCH(ptl1, i) 121 #define SET_PTL3_PRESENT_ARCH(ptl2, i) 122 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 123 set_pt_present((pte_t *) (ptl3), (size_t) (i)) 124 117 125 /* Macros for querying the last level entries. */ 118 126 #define PTE_VALID_ARCH(p) \ … … 194 202 } 195 203 204 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 205 { 206 pte_t *p = &pt[i]; 207 208 p->present = 1; 209 } 210 196 211 extern void page_arch_init(void); 197 212 extern void page_fault(unsigned int, istate_t *); -
kernel/arch/ia32/src/boot/multiboot.S
rbc216a0 rda68871a 73 73 74 74 multiboot_image_start: 75 cli 75 76 cld 76 77 … … 78 79 movl $START_STACK, %esp 79 80 80 /* Initialize Global Descriptor Table register */ 81 /* 82 * Initialize Global Descriptor Table and 83 * Interrupt Descriptor Table registers 84 */ 81 85 lgdtl bootstrap_gdtr 86 lidtl bootstrap_idtr 82 87 83 88 /* Kernel data + stack */ … … 701 706 page_directory: 702 707 .space 4096, 0 708 709 .global bootstrap_idtr 710 bootstrap_idtr: 711 .word 0 712 .long 0 703 713 704 714 .global bootstrap_gdtr -
kernel/arch/ia32/src/boot/multiboot2.S
rbc216a0 rda68871a 114 114 115 115 multiboot2_image_start: 116 cli 116 117 cld 117 118 … … 119 120 movl $START_STACK, %esp 120 121 121 /* Initialize Global Descriptor Table register */ 122 /* 123 * Initialize Global Descriptor Table and 124 * Interrupt Descriptor Table registers 125 */ 122 126 lgdtl bootstrap_gdtr 127 lidtl bootstrap_idtr 123 128 124 129 /* Kernel data + stack */ -
kernel/arch/ia32/src/boot/vesa_prot.inc
rbc216a0 rda68871a 88 88 /* Returned back to protected mode */ 89 89 90 /* 91 * Initialize Global Descriptor Table and 92 * Interrupt Descriptor Table registers 93 */ 94 lgdtl bootstrap_gdtr 95 lidtl bootstrap_idtr 96 90 97 movzx %ax, %ecx 91 98 mov %ecx, KA2PA(bfb_scanline) -
kernel/arch/ia32/src/boot/vesa_real.inc
rbc216a0 rda68871a 30 30 .code32 31 31 vesa_init: 32 lidtl vesa_idtr 32 33 jmp $GDT_SELECTOR(VESA_INIT_DES), $vesa_init_real - vesa_init 34 35 vesa_idtr: 36 .word 0x3ff 37 .long 0 33 38 34 39 .code16 -
kernel/arch/ia32/src/boot/vesa_ret.inc
rbc216a0 rda68871a 1 1 .code32 2 2 vesa_init_protected: 3 cli 3 4 cld 4 5 -
kernel/arch/ia32/src/mm/page.c
rbc216a0 rda68871a 71 71 for (cur = 0; cur < min(config.identity_size, config.physmem_end); 72 72 cur += FRAME_SIZE) { 73 flags = PAGE_CACHEABLE | PAGE_WRITE; 74 if ((PA2KA(cur) >= config.base) && 75 (PA2KA(cur) < config.base + config.kernel_size)) 76 flags |= PAGE_GLOBAL; 73 flags = PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_WRITE | PAGE_READ; 77 74 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 78 75 } -
kernel/arch/ia32/src/smp/apic.c
rbc216a0 rda68871a 259 259 } 260 260 261 static void ipi_wait_for_idle(void) 261 /* Waits for the destination cpu to accept the previous ipi. */ 262 static void l_apic_wait_for_delivery(void) 262 263 { 263 264 icr_t icr; 264 265 265 /* Wait for the destination cpu to accept the previous ipi. */266 266 do { 267 267 icr.lo = l_apic[ICRlo]; … … 281 281 282 282 /* Wait for a destination cpu to accept our previous ipi. */ 283 ipi_wait_for_idle();283 l_apic_wait_for_delivery(); 284 284 285 285 icr.lo = l_apic[ICRlo]; … … 298 298 l_apic[ICRlo] = icr.lo; 299 299 300 #ifdef CONFIG_DEBUG301 icr.lo = l_apic[ICRlo];302 if (icr.delivs == DELIVS_PENDING) {303 printf("IPI is pending.\n");304 }305 #endif306 307 300 return apic_poll_errors(); 308 301 } … … 320 313 321 314 /* Wait for a destination cpu to accept our previous ipi. */ 322 ipi_wait_for_idle();315 l_apic_wait_for_delivery(); 323 316 324 317 icr.lo = l_apic[ICRlo]; … … 332 325 l_apic[ICRlo] = icr.lo; 333 326 334 icr.lo = l_apic[ICRlo];335 if (icr.delivs == DELIVS_PENDING) {336 #ifdef CONFIG_DEBUG337 printf("IPI is pending.\n");338 #endif339 }340 341 327 return apic_poll_errors(); 342 328 } … … 379 365 return 0; 380 366 367 l_apic_wait_for_delivery(); 368 381 369 icr.lo = l_apic[ICRlo]; 382 if (icr.delivs == DELIVS_PENDING) {383 #ifdef CONFIG_DEBUG384 printf("IPI is pending.\n");385 #endif386 }387 388 370 icr.delmod = DELMOD_INIT; 389 371 icr.destmod = DESTMOD_PHYS; … … 518 500 dfr.model = MODEL_FLAT; 519 501 l_apic[DFR] = dfr.value; 520 521 if (CPU->arch.id != l_apic_id()) {522 #ifdef CONFIG_DEBUG523 printf("lapic error: LAPIC ID (%" PRIu8 ") and hw ID assigned by BSP"524 " (%u) differ. Correcting to LAPIC ID.\n", l_apic_id(),525 CPU->arch.id);526 #endif527 CPU->arch.id = l_apic_id();528 }529 530 502 } 531 503 -
kernel/arch/ia64/Makefile.inc
rbc216a0 rda68871a 30 30 BFD_ARCH = ia64-elf64 31 31 32 CMN1 = -mconstant-gp -fno-unwind-tables -mfixed-range=f32-f127 32 # 33 # FIXME: 34 # 35 # The -fno-selective-scheduling and -fno-selective-scheduling2 options 36 # should be removed as soon as a bug in GCC concerning unchecked 37 # speculative loads is fixed. 38 # 39 # See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 for reference. 40 # 41 42 CMN1 = -mconstant-gp -fno-unwind-tables -mfixed-range=f32-f127 -fno-selective-scheduling -fno-selective-scheduling2 33 43 GCC_CFLAGS += $(CMN1) 34 44 ICC_CFLAGS += $(CMN1) -
kernel/arch/mips32/Makefile.inc
rbc216a0 rda68871a 29 29 BFD_ARCH = mips 30 30 BFD = binary 31 GCC_CFLAGS += -m no-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=3231 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32 32 32 33 33 BITS = 32 … … 48 48 BFD_NAME = elf32-tradlittlemips 49 49 ENDIANESS = LE 50 GCC_CFLAGS += -mhard-float51 50 endif 52 51 -
kernel/arch/mips32/include/mm/page.h
rbc216a0 rda68871a 128 128 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) 129 129 130 /* Set PTE present bit accessors for each level. */ 131 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 132 set_pt_present((pte_t *) (ptl0), (size_t) (i)) 133 #define SET_PTL2_PRESENT_ARCH(ptl1, i) 134 #define SET_PTL3_PRESENT_ARCH(ptl2, i) 135 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 136 set_pt_present((pte_t *) (ptl3), (size_t) (i)) 137 130 138 /* Last-level info macros. */ 131 139 #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) … … 182 190 } 183 191 192 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 193 { 194 pte_t *p = &pt[i]; 195 196 p->p = 1; 197 } 198 199 184 200 extern void page_arch_init(void); 185 201 -
kernel/arch/mips64/Makefile.inc
rbc216a0 rda68871a 29 29 BFD_ARCH = mips:4000 30 30 BFD = binary 31 GCC_CFLAGS += -m no-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=6431 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=64 32 32 AFLAGS = -64 33 33 … … 40 40 BFD_NAME = elf64-tradlittlemips 41 41 ENDIANESS = LE 42 GCC_CFLAGS += -mhard-float43 42 endif 44 43 -
kernel/arch/ppc32/include/mm/page.h
rbc216a0 rda68871a 128 128 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ 129 129 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) 130 131 /* Set PTE present accessors for each level. */ 132 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \ 133 set_pt_present((pte_t *) (ptl0), (size_t) (i)) 134 135 #define SET_PTL2_PRESENT_ARCH(ptl1, i) 136 #define SET_PTL3_PRESENT_ARCH(ptl2, i) 137 138 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \ 139 set_pt_present((pte_t *) (ptl3), (size_t) (i)) 130 140 131 141 /* Macros for querying the last-level PTEs. */ … … 175 185 } 176 186 187 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 188 { 189 pte_t *entry = &pt[i]; 190 191 entry->present = 1; 192 } 193 177 194 extern void page_arch_init(void); 178 195 -
kernel/arch/sparc64/src/smp/sun4u/ipi.c
rbc216a0 rda68871a 124 124 (void) interrupts_disable(); 125 125 } 126 } while ( done);126 } while (!done); 127 127 128 128 preemption_enable();
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