source: mainline/kernel/arch/ia32/include/mm/page.h@ c0699467

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c0699467 was c0699467, checked in by Martin Decky <martin@…>, 14 years ago

do not provide general access to kernel headers from uspace, only allow specific headers to be accessed or shared
externalize headers which serve as kernel/uspace API/ABI into a special tree

  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32mm
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_ia32_PAGE_H_
36#define KERN_ia32_PAGE_H_
37
38#include <arch/mm/frame.h>
39#include <trace.h>
40
41#define PAGE_WIDTH FRAME_WIDTH
42#define PAGE_SIZE FRAME_SIZE
43
44#ifndef __ASM__
45
46#define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000))
47#define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x80000000))
48
49#else /* __ASM__ */
50
51#define KA2PA(x) ((x) - 0x80000000)
52#define PA2KA(x) ((x) + 0x80000000)
53
54#endif /* __ASM__ */
55
56/*
57 * Implementation of generic 4-level page table interface.
58 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
59 */
60
61/* Number of entries in each level. */
62#define PTL0_ENTRIES_ARCH 1024
63#define PTL1_ENTRIES_ARCH 0
64#define PTL2_ENTRIES_ARCH 0
65#define PTL3_ENTRIES_ARCH 1024
66
67/* Page table sizes for each level. */
68#define PTL0_SIZE_ARCH ONE_FRAME
69#define PTL1_SIZE_ARCH 0
70#define PTL2_SIZE_ARCH 0
71#define PTL3_SIZE_ARCH ONE_FRAME
72
73/* Macros calculating indices for each level. */
74#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU)
75#define PTL1_INDEX_ARCH(vaddr) 0
76#define PTL2_INDEX_ARCH(vaddr) 0
77#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU)
78
79/* Get PTE address accessors for each level. */
80#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
81 ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12))
82#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
83 (ptl1)
84#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
85 (ptl2)
86#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
87 ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12))
88
89/* Set PTE address accessors for each level. */
90#define SET_PTL0_ADDRESS_ARCH(ptl0) \
91 (write_cr3((uintptr_t) (ptl0)))
92#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
93 (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12)
94#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
95#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
96#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
97 (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12)
98
99/* Get PTE flags accessors for each level. */
100#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
101 get_pt_flags((pte_t *) (ptl0), (size_t) (i))
102#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
103 PAGE_PRESENT
104#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
105 PAGE_PRESENT
106#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
107 get_pt_flags((pte_t *) (ptl3), (size_t) (i))
108
109/* Set PTE flags accessors for each level. */
110#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
111 set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
112#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
113#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
114#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
115 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
116
117/* Macros for querying the last level entries. */
118#define PTE_VALID_ARCH(p) \
119 (*((uint32_t *) (p)) != 0)
120#define PTE_PRESENT_ARCH(p) \
121 ((p)->present != 0)
122#define PTE_GET_FRAME_ARCH(p) \
123 ((p)->frame_address << FRAME_WIDTH)
124#define PTE_WRITABLE_ARCH(p) \
125 ((p)->writeable != 0)
126#define PTE_EXECUTABLE_ARCH(p) 1
127
128#ifndef __ASM__
129
130#include <mm/mm.h>
131#include <arch/interrupt.h>
132#include <typedefs.h>
133
134/* Page fault error codes. */
135
136/** When bit on this position is 0, the page fault was caused by a not-present
137 * page.
138 */
139#define PFERR_CODE_P (1 << 0)
140
141/** When bit on this position is 1, the page fault was caused by a write. */
142#define PFERR_CODE_RW (1 << 1)
143
144/** When bit on this position is 1, the page fault was caused in user mode. */
145#define PFERR_CODE_US (1 << 2)
146
147/** When bit on this position is 1, a reserved bit was set in page directory. */
148#define PFERR_CODE_RSVD (1 << 3)
149
150/** Page Table Entry. */
151typedef struct {
152 unsigned present : 1;
153 unsigned writeable : 1;
154 unsigned uaccessible : 1;
155 unsigned page_write_through : 1;
156 unsigned page_cache_disable : 1;
157 unsigned accessed : 1;
158 unsigned dirty : 1;
159 unsigned pat : 1;
160 unsigned global : 1;
161 unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */
162 unsigned avl : 2;
163 unsigned frame_address : 20;
164} __attribute__ ((packed)) pte_t;
165
166NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
167{
168 pte_t *p = &pt[i];
169
170 return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT |
171 (!p->present) << PAGE_PRESENT_SHIFT |
172 p->uaccessible << PAGE_USER_SHIFT |
173 1 << PAGE_READ_SHIFT |
174 p->writeable << PAGE_WRITE_SHIFT |
175 1 << PAGE_EXEC_SHIFT |
176 p->global << PAGE_GLOBAL_SHIFT);
177}
178
179NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
180{
181 pte_t *p = &pt[i];
182
183 p->page_cache_disable = !(flags & PAGE_CACHEABLE);
184 p->present = !(flags & PAGE_NOT_PRESENT);
185 p->uaccessible = (flags & PAGE_USER) != 0;
186 p->writeable = (flags & PAGE_WRITE) != 0;
187 p->global = (flags & PAGE_GLOBAL) != 0;
188
189 /*
190 * Ensure that there is at least one bit set even if the present bit is
191 * cleared.
192 */
193 p->soft_valid = true;
194}
195
196extern void page_arch_init(void);
197extern void page_fault(unsigned int, istate_t *);
198
199#endif /* __ASM__ */
200
201#endif
202
203/** @}
204 */
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