Changeset d6dcdd2e in mainline for arch/ia32/include/asm.h
- Timestamp:
- 2005-09-13T21:20:56Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 01e48c1
- Parents:
- b1cf98c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/include/asm.h
rb1cf98c rd6dcdd2e 31 31 32 32 #include <arch/types.h> 33 #include <typedefs.h>34 #include <config.h>35 #include <synch/spinlock.h>36 #include <arch/boot/memmap.h>37 33 #include <config.h> 38 34 … … 62 58 * Halt the current CPU until interrupt event. 63 59 */ 64 static inline void cpu_halt(void) { __asm__("hlt "); };65 static inline void cpu_sleep(void) { __asm__("hlt "); };60 static inline void cpu_halt(void) { __asm__("hlt\n"); }; 61 static inline void cpu_sleep(void) { __asm__("hlt\n"); }; 66 62 67 63 /** Read CR2 … … 71 67 * @return Value read. 72 68 */ 73 static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0 " : "=r" (v)); return v; }69 static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; } 74 70 75 71 /** Write CR3 … … 87 83 * @return Value read. 88 84 */ 89 static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0 " : "=r" (v)); return v; }85 static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; } 90 86 91 87 /** Set priority level low … … 162 158 } 163 159 160 static inline __u64 rdtsc(void) 161 { 162 __u64 v; 163 164 __asm__ volatile("rdtsc\n" : "=A" (v)); 165 166 return v; 167 } 168 164 169 #endif
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