source: mainline/arch/ia32/include/asm.h@ 9c0a9b3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9c0a9b3 was 9c0a9b3, checked in by Jakub Vana <jakub.vana@…>, 20 years ago

1) memcopy and _memcopy functions rewriten to ANSI C norm.
2) Repaired ia32,ia64 and mips version of SPARTAN to work with this memcopy functions
3) Warning for non declared funcions added and repaired ia32,ia64 and mips versions to pass build process with this warning and Werror option

  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ia32_ASM_H__
30#define __ia32_ASM_H__
31
32#include <arch/types.h>
33#include <typedefs.h>
34#include <config.h>
35#include <synch/spinlock.h>
36#include <arch/boot/memmap.h>
37#include <config.h>
38
39extern __u32 interrupt_handler_size;
40
41extern void paging_on(void);
42
43extern void interrupt_handlers(void);
44
45extern __u8 inb(int port);
46extern __u16 inw(int port);
47extern __u32 inl(int port);
48
49extern void outb(int port, __u8 b);
50extern void outw(int port, __u16 w);
51extern void outl(int port, __u32 l);
52
53extern void enable_l_apic_in_msr(void);
54
55
56void asm_delay_loop(__u32 t);
57void asm_fake_loop(__u32 t);
58
59
60/** Halt CPU
61 *
62 * Halt the current CPU until interrupt event.
63 */
64static inline void cpu_halt(void) { __asm__("hlt"); };
65static inline void cpu_sleep(void) { __asm__("hlt"); };
66
67/** Read CR2
68 *
69 * Return value in CR2
70 *
71 * @return Value read.
72 */
73static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
74
75/** Write CR3
76 *
77 * Write value to CR3.
78 *
79 * @param v Value to be written.
80 */
81static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
82
83/** Read CR3
84 *
85 * Return value in CR3
86 *
87 * @return Value read.
88 */
89static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
90
91/** Set priority level low
92 *
93 * Enable interrupts and return previous
94 * value of EFLAGS.
95 */
96static inline pri_t cpu_priority_low(void) {
97 pri_t v;
98 __asm__ volatile (
99 "pushf\n"
100 "popl %0\n"
101 "sti\n"
102 : "=r" (v)
103 );
104 return v;
105}
106
107/** Set priority level high
108 *
109 * Disable interrupts and return previous
110 * value of EFLAGS.
111 */
112static inline pri_t cpu_priority_high(void) {
113 pri_t v;
114 __asm__ volatile (
115 "pushf\n"
116 "popl %0\n"
117 "cli\n"
118 : "=r" (v)
119 );
120 return v;
121}
122
123/** Restore priority level
124 *
125 * Restore EFLAGS.
126 */
127static inline void cpu_priority_restore(pri_t pri) {
128 __asm__ volatile (
129 "pushl %0\n"
130 "popf\n"
131 : : "r" (pri)
132 );
133}
134
135/** Return raw priority level
136 *
137 * Return EFLAFS.
138 */
139static inline pri_t cpu_priority_read(void) {
140 pri_t v;
141 __asm__ volatile (
142 "pushf\n"
143 "popl %0\n"
144 : "=r" (v)
145 );
146 return v;
147}
148
149/** Return base address of current stack
150 *
151 * Return the base address of the current stack.
152 * The stack is assumed to be STACK_SIZE bytes long.
153 * The stack must start on page boundary.
154 */
155static inline __address get_stack_base(void)
156{
157 __address v;
158
159 __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
160
161 return v;
162}
163
164#endif
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