Changeset cc205f1 in mainline for arch/mips32/include/mm/tlb.h
- Timestamp:
- 2005-10-06T12:45:22Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- fd3c9e5
- Parents:
- bca1b47
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips32/include/mm/tlb.h
rbca1b47 rcc205f1 42 42 #define PAGE_CACHEABLE_EXC_WRITE 5 43 43 44 struct entry_lo { 45 unsigned g : 1; /* global bit */ 46 unsigned v : 1; /* valid bit */ 47 unsigned d : 1; /* dirty/write-protect bit */ 48 unsigned c : 3; /* cache coherency attribute */ 49 unsigned pfn : 24; /* frame number */ 50 unsigned zero: 2; /* zero */ 51 } __attribute__ ((packed)); 44 union entry_lo { 45 struct { 46 unsigned g : 1; /* global bit */ 47 unsigned v : 1; /* valid bit */ 48 unsigned d : 1; /* dirty/write-protect bit */ 49 unsigned c : 3; /* cache coherency attribute */ 50 unsigned pfn : 24; /* frame number */ 51 unsigned zero: 2; /* zero */ 52 } __attribute__ ((packed)); 53 __u32 value; 54 }; 52 55 53 56 struct pte { … … 61 64 } __attribute__ ((packed)); 62 65 63 struct entry_hi { 64 unsigned asid : 8; 65 unsigned : 5; 66 unsigned vpn2 : 19; 67 } __attribute__ ((packed)); 66 union entry_hi { 67 struct { 68 unsigned asid : 8; 69 unsigned : 5; 70 unsigned vpn2 : 19; 71 } __attribute__ ((packed)); 72 __u32 value; 73 }; 68 74 69 struct page_mask { 70 unsigned : 13; 71 unsigned mask : 12; 72 unsigned : 7; 73 } __attribute__ ((packed)); 75 union page_mask { 76 struct { 77 unsigned : 13; 78 unsigned mask : 12; 79 unsigned : 7; 80 } __attribute__ ((packed)); 81 __u32 value; 82 }; 74 83 75 struct index { 76 unsigned index : 4; 77 unsigned : 27; 78 unsigned p : 1; 79 } __attribute__ ((packed)); 84 union index { 85 struct { 86 unsigned index : 4; 87 unsigned : 27; 88 unsigned p : 1; 89 } __attribute__ ((packed)); 90 __u32 value; 91 }; 92 93 typedef union entry_lo entry_lo_t; 94 typedef union entry_hi entry_hi_t; 95 typedef union page_mask page_mask_t; 96 typedef union index tlb_index_t; 80 97 81 98 /** Probe TLB for Matching Entry
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