Changeset a83a802 in mainline for arch/ia32/src

Timestamp:

2005-11-23T13:28:17Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8418c7d

Parents:

607c5f9

Message:

SMP work.
Add madt_irq_to_pin().
Make ksmp() use virtual irq_to_pin() function, which makes better sence for ACPI configurations.

Location:

arch/ia32/src

Files:

• drivers/i8042.c (modified) (3 diffs)
• ia32.c (modified) (2 diffs)
• smp/apic.c (modified) (6 diffs)
• smp/mps.c (modified) (2 diffs)
• smp/smp.c (modified) (1 diff)

arch/ia32/src/drivers/i8042.c

@@ -43 +43 @@
  * It takes care of low-level keyboard functions.
  */
+
+#define i8042_DATA              0x60
+#define i8042_STATUS            0x64
+
+/** Keyboard commands. */
+#define KBD_ENABLE      0xf4
+#define KBD_DISABLE     0xf5
+#define KBD_ACK         0xfa
 
 #define SPECIAL         '?'
@@ -231 +239 @@
 {
         trap_register(VECTOR_KBD, i8042_interrupt);
+        trap_virtual_enable_irqs(1<<IRQ_KBD);
         spinlock_initialize(&keylock);
         chardev_initialize(&kbrd, &ops);
@@ -246 +255 @@
 
         trap_virtual_eoi();
-        x = inb(0x60);
+        x = inb(i8042_DATA);
         if (x & KEY_RELEASE)
                 key_released(x ^ KEY_RELEASE);

arch/ia32/src/ia32.c

@@ -57 +57 @@
         if (config.cpu_active == 1) {
                 bios_init();
-                i8042_init();   /* keyboard controller */
                 i8259_init();   /* PIC */
                 i8254_init();   /* hard clock */
@@ -90 +89 @@
 void arch_post_smp_init(void)
 {
-        trap_virtual_enable_irqs(1<<IRQ_KBD);
+        i8042_init();   /* keyboard controller */
 }
 

arch/ia32/src/smp/apic.c

@@ -41 +41 @@
 
 /*
- * This is functional, far-from-general-enough interface to the APIC.
- * Advanced Programmable Interrupt Controller for MP systems.
+ * Advanced Programmable Interrupt Controller for SMP systems.
  * Tested on:
  *      Bochs 2.0.2 - Bochs 2.2 with 2-8 CPUs
@@ -83 +82 @@
         io_apic_disable_irqs(0xffff);
         trap_register(VECTOR_CLK, l_apic_timer_interrupt);
-        for (i=1; i<16; i++) {
+        for (i=0; i<16; i++) {
                 int pin;
         
-                if ((pin = mps_irq_to_pin(i)) != -1)
-                io_apic_change_ioredtbl(pin,0xf,IVT_IRQBASE+i,LOPRI);
+                if ((pin = smp_irq_to_pin(i)) != -1) {
+                        io_apic_change_ioredtbl(pin,0xff,IVT_IRQBASE+i,LOPRI);
+                }
         }
         
@@ -353 +353 @@
 void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags)
 {
-        __u32 reglo, reghi;
+        io_redirection_reg_t reg;
         int dlvr = 0;
         
         if (flags & LOPRI)
-                dlvr = 1;
-        
-        reglo = io_apic_read(IOREDTBL + signal*2);
-        reghi = io_apic_read(IOREDTBL + signal*2 + 1);
-        
-        reghi &= ~0x0f000000;
-        reghi |= (dest<<24);
-
-        reglo &= (~0x1ffff) | (1<<16); /* don't touch the mask */
-        reglo |= (0<<15) | (0<<13) | (0<<11) | (dlvr<<8) | v;
-
-        io_apic_write(IOREDTBL + signal*2, reglo);              
-        io_apic_write(IOREDTBL + signal*2 + 1, reghi);
+                dlvr = DELMOD_LOWPRI;
+
+        
+        reg.lo = io_apic_read(IOREDTBL + signal*2);
+        reg.hi = io_apic_read(IOREDTBL + signal*2 + 1);
+        
+        reg.dest =  dest;
+        reg.destmod = DESTMOD_LOGIC;
+        reg.trigger_mode = TRIGMOD_EDGE;
+        reg.intpol = POLARITY_HIGH;
+        reg.delmod = dlvr;
+        reg.intvec = v;
+
+        io_apic_write(IOREDTBL + signal*2, reg.lo);
+        io_apic_write(IOREDTBL + signal*2 + 1, reg.hi);
 }
 
 void io_apic_disable_irqs(__u16 irqmask)
 {
-        int i,pin;
-        __u32 reglo;
+        io_redirection_reg_t reg;
+        int i, pin;
         
         for (i=0;i<16;i++) {
@@ -383 +385 @@
                          * mapping for the respective IRQ number.
                          */
-                        pin = mps_irq_to_pin(i);
+                        pin = smp_irq_to_pin(i);
                         if (pin != -1) {
-                                reglo = io_apic_read(IOREDTBL + pin*2);
-                                reglo |= (1<<16);
-                                io_apic_write(IOREDTBL + pin*2,reglo);
+                                reg.lo = io_apic_read(IOREDTBL + pin*2);
+                                reg.masked = true;
+                                io_apic_write(IOREDTBL + pin*2, reg.lo);
                         }
                         
@@ -396 +398 @@
 void io_apic_enable_irqs(__u16 irqmask)
 {
-        int i,pin;
-        __u32 reglo;
+        int i, pin;
+        io_redirection_reg_t reg;       
         
         for (i=0;i<16;i++) {
@@ -405 +407 @@
                          * mapping for the respective IRQ number.
                          */
-                        pin = mps_irq_to_pin(i);
+                        pin = smp_irq_to_pin(i);
                         if (pin != -1) {
-                                reglo = io_apic_read(IOREDTBL + pin*2);
-                                reglo &= ~(1<<16);
-                                io_apic_write(IOREDTBL + pin*2,reglo);
+                                reg.lo = io_apic_read(IOREDTBL + pin*2);
+                                reg.masked = false;
+                                io_apic_write(IOREDTBL + pin*2, reg.lo);
                         }
                         

arch/ia32/src/smp/mps.c

@@ -90 +90 @@
 static bool is_bsp(index_t i);
 static __u8 get_cpu_apic_id(index_t i);
+static int mps_irq_to_pin(int irq);
 
 struct smp_config_operations mps_config_operations = {
@@ -95 +96 @@
         .cpu_enabled = is_cpu_enabled,
         .cpu_bootstrap = is_bsp,
-        .cpu_apic_id = get_cpu_apic_id
+        .cpu_apic_id = get_cpu_apic_id,
+        .irq_to_pin = mps_irq_to_pin
 };
 

arch/ia32/src/smp/smp.c

@@ -166 +166 @@
 }
 
+int smp_irq_to_pin(int irq)
+{
+        ASSERT(ops != NULL);
+        return ops->irq_to_pin(irq);
+}
+
 #endif /* CONFIG_SMP */