Changeset 98000fb in mainline for kernel/arch


Ignore:
Timestamp:
2009-06-03T19:34:45Z (16 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
301ff30
Parents:
69e68e3
Message:

remove redundant index_t and count_t types (which were always quite ambiguous and not actually needed)

Location:
kernel/arch
Files:
45 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/include/cpu.h

    r69e68e3 r98000fb  
    6565        tss_t *tss;
    6666       
    67         count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
     67        size_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
    6868} cpu_arch_t;
    6969

  • kernel/arch/amd64/include/mm/page.h

    r69e68e3 r98000fb  
    113113        (write_cr3((uintptr_t) (ptl0)))
    114114#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
    115         set_pt_addr((pte_t *) (ptl0), (index_t) (i), a)
     115        set_pt_addr((pte_t *) (ptl0), (size_t) (i), a)
    116116#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) \
    117         set_pt_addr((pte_t *) (ptl1), (index_t) (i), a)
     117        set_pt_addr((pte_t *) (ptl1), (size_t) (i), a)
    118118#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \
    119         set_pt_addr((pte_t *) (ptl2), (index_t) (i), a)
     119        set_pt_addr((pte_t *) (ptl2), (size_t) (i), a)
    120120#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
    121         set_pt_addr((pte_t *) (ptl3), (index_t) (i), a)
     121        set_pt_addr((pte_t *) (ptl3), (size_t) (i), a)
    122122
    123123/* Get PTE flags accessors for each level. */
    124124#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    125         get_pt_flags((pte_t *) (ptl0), (index_t) (i))
     125        get_pt_flags((pte_t *) (ptl0), (size_t) (i))
    126126#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    127         get_pt_flags((pte_t *) (ptl1), (index_t) (i))
     127        get_pt_flags((pte_t *) (ptl1), (size_t) (i))
    128128#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
    129         get_pt_flags((pte_t *) (ptl2), (index_t) (i))
     129        get_pt_flags((pte_t *) (ptl2), (size_t) (i))
    130130#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    131         get_pt_flags((pte_t *) (ptl3), (index_t) (i))
     131        get_pt_flags((pte_t *) (ptl3), (size_t) (i))
    132132
    133133/* Set PTE flags accessors for each level. */
    134134#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    135         set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
     135        set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
    136136#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \
    137         set_pt_flags((pte_t *) (ptl1), (index_t) (i), (x))
     137        set_pt_flags((pte_t *) (ptl1), (size_t) (i), (x))
    138138#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \
    139         set_pt_flags((pte_t *) (ptl2), (index_t) (i), (x))
     139        set_pt_flags((pte_t *) (ptl2), (size_t) (i), (x))
    140140#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    141         set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
     141        set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
    142142
    143143/* Macros for querying the last-level PTE entries. */
    … …  
    177177#define PFERR_CODE_ID           (1 << 4)
    178178
    179 static inline int get_pt_flags(pte_t *pt, index_t i)
     179static inline int get_pt_flags(pte_t *pt, size_t i)
    180180{
    181181        pte_t *p = &pt[i];
    … …  
    190190}
    191191
    192 static inline void set_pt_addr(pte_t *pt, index_t i, uintptr_t a)
     192static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a)
    193193{
    194194        pte_t *p = &pt[i];
    … …  
    198198}
    199199
    200 static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
     200static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    201201{
    202202        pte_t *p = &pt[i];

  • kernel/arch/amd64/include/proc/task.h

    r69e68e3 r98000fb  
    4141typedef struct {
    4242        /** I/O Permission bitmap Generation counter. */
    43         count_t iomapver;
     43        size_t iomapver;
    4444        /** I/O Permission bitmap. */
    4545        bitmap_t iomap;

  • kernel/arch/amd64/include/types.h

    r69e68e3 r98000fb  
    4747
    4848typedef uint64_t size_t;
    49 typedef uint64_t count_t;
    50 typedef uint64_t index_t;
    5149
    5250typedef uint64_t uintptr_t;
    … …  
    6159} fncptr_t;
    6260
    63 /**< Formats for uintptr_t, size_t, count_t and index_t */
     61/**< Formats for uintptr_t, size_t */
    6462#define PRIp "llx"
    6563#define PRIs "llu"
    66 #define PRIc "llu"
    67 #define PRIi "llu"
    6864
    6965/**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */

  • kernel/arch/amd64/src/ddi/ddi.c

    r69e68e3 r98000fb  
    5757int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
    5858{
    59         count_t bits;
     59        size_t bits;
    6060       
    6161        bits = ioaddr + size;
    … …  
    9999         * Enable the range and we are done.
    100100         */
    101         bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
     101        bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, (size_t) size);
    102102       
    103103        /*
    … …  
    118118void io_perm_bitmap_install(void)
    119119{
    120         count_t bits;
     120        size_t bits;
    121121        ptr_16_64_t cpugdtr;
    122122        descriptor_t *gdt_p;
    123123        tss_descriptor_t *tss_desc;
    124         count_t ver;
     124        size_t ver;
    125125       
    126126        /* First, copy the I/O Permission Bitmap. */

  • kernel/arch/amd64/src/interrupt.c

    r69e68e3 r98000fb  
    102102{
    103103        if (TASK) {
    104                 count_t ver;
     104                size_t ver;
    105105
    106106                spinlock_lock(&TASK->lock);

  • kernel/arch/arm32/include/mm/page.h

    r69e68e3 r98000fb  
    9595/* Get PTE flags accessors for each level. */
    9696#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    97         get_pt_level0_flags((pte_level0_t *) (ptl0), (index_t) (i))
     97        get_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i))
    9898#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    9999        PAGE_PRESENT
    … …  
    101101        PAGE_PRESENT
    102102#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    103         get_pt_level1_flags((pte_level1_t *) (ptl3), (index_t) (i))
     103        get_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i))
    104104
    105105/* Set PTE flags accessors for each level. */
    106106#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    107         set_pt_level0_flags((pte_level0_t *) (ptl0), (index_t) (i), (x))
     107        set_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i), (x))
    108108#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    109109#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
    110110#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    111         set_pt_level1_flags((pte_level1_t *) (ptl3), (index_t) (i), (x))
     111        set_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i), (x))
    112112
    113113/* Macros for querying the last-level PTE entries. */
    … …  
    205205 *  @param i      Index of the entry to return.
    206206 */
    207 static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
     207static inline int get_pt_level0_flags(pte_level0_t *pt, size_t i)
    208208{
    209209        pte_level0_t *p = &pt[i];
    … …  
    220220 *  @param i      Index of the entry to return.
    221221 */
    222 static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
     222static inline int get_pt_level1_flags(pte_level1_t *pt, size_t i)
    223223{
    224224        pte_level1_t *p = &pt[i];
    … …  
    245245 *  @param flags  new flags
    246246 */
    247 static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)
     247static inline void set_pt_level0_flags(pte_level0_t *pt, size_t i, int flags)
    248248{
    249249        pte_level0_t *p = &pt[i];
    … …  
    273273 *  @param flags  New flags.
    274274 */ 
    275 static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags)
     275static inline void set_pt_level1_flags(pte_level1_t *pt, size_t i, int flags)
    276276{
    277277        pte_level1_t *p = &pt[i];

  • kernel/arch/arm32/include/types.h

    r69e68e3 r98000fb  
    5454
    5555typedef uint32_t size_t;
    56 typedef uint32_t count_t;
    57 typedef uint32_t index_t;
    5856
    5957typedef uint32_t uintptr_t;
    … …  
    7068#define PRIp "x"        /**< Format for uintptr_t. */
    7169#define PRIs "u"        /**< Format for size_t. */
    72 #define PRIc "u"        /**< Format for count_t. */
    73 #define PRIi "u"        /**< Format for index_t. */
    7470
    7571#define PRId8 "d"       /**< Format for int8_t. */

  • kernel/arch/arm32/src/mm/tlb.c

    r69e68e3 r98000fb  
    8181 * @param cnt Number of entries to invalidate.
    8282 */
    83 void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt)
     83void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt)
    8484{
    8585        unsigned int i;

  • kernel/arch/ia32/include/cpu.h

    r69e68e3 r98000fb  
    5858        tss_t *tss;
    5959       
    60         count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
     60        size_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
    6161} cpu_arch_t;
    6262

  • kernel/arch/ia32/include/mm/page.h

    r69e68e3 r98000fb  
    9696/* Get PTE flags accessors for each level. */
    9797#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    98         get_pt_flags((pte_t *) (ptl0), (index_t) (i))
     98        get_pt_flags((pte_t *) (ptl0), (size_t) (i))
    9999#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    100100        PAGE_PRESENT
    … …  
    102102        PAGE_PRESENT
    103103#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    104         get_pt_flags((pte_t *) (ptl3), (index_t) (i))
     104        get_pt_flags((pte_t *) (ptl3), (size_t) (i))
    105105
    106106/* Set PTE flags accessors for each level. */
    107107#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    108         set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
     108        set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
    109109#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    110110#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
    111111#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    112         set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
     112        set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
    113113
    114114/* Macros for querying the last level entries. */
    … …  
    146146#define PFERR_CODE_RSVD         (1 << 3)       
    147147
    148 static inline int get_pt_flags(pte_t *pt, index_t i)
     148static inline int get_pt_flags(pte_t *pt, size_t i)
    149149{
    150150        pte_t *p = &pt[i];
    … …  
    159159}
    160160
    161 static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
     161static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    162162{
    163163        pte_t *p = &pt[i];

  • kernel/arch/ia32/include/proc/task.h

    r69e68e3 r98000fb  
    4141typedef struct {
    4242        /** I/O Permission bitmap Generation counter. */
    43         count_t iomapver;
     43        size_t iomapver;
    4444        /** I/O Permission bitmap. */
    4545        bitmap_t iomap;

  • kernel/arch/ia32/include/smp/smp.h

    r69e68e3 r98000fb  
    4040/** SMP config opertaions interface. */
    4141struct smp_config_operations {
    42         count_t (* cpu_count)(void);            /**< Return number of detected processors. */
    43         bool (* cpu_enabled)(index_t i);        /**< Check whether the processor of index i is enabled. */
    44         bool (*cpu_bootstrap)(index_t i);       /**< Check whether the processor of index i is BSP. */
    45         uint8_t (*cpu_apic_id)(index_t i);              /**< Return APIC ID of the processor of index i. */
     42        size_t (* cpu_count)(void);             /**< Return number of detected processors. */
     43        bool (* cpu_enabled)(size_t i); /**< Check whether the processor of index i is enabled. */
     44        bool (*cpu_bootstrap)(size_t i);        /**< Check whether the processor of index i is BSP. */
     45        uint8_t (*cpu_apic_id)(size_t i);               /**< Return APIC ID of the processor of index i. */
    4646        int (*irq_to_pin)(unsigned int irq);            /**< Return mapping between irq and APIC pin. */
    4747};

  • kernel/arch/ia32/include/types.h

    r69e68e3 r98000fb  
    4747
    4848typedef uint32_t size_t;
    49 typedef uint32_t count_t;
    50 typedef uint32_t index_t;
    5149
    5250typedef uint32_t uintptr_t;
    … …  
    6361#define PRIp "x"        /**< Format for uintptr_t. */
    6462#define PRIs "u"        /**< Format for size_t. */
    65 #define PRIc "u"        /**< Format for count_t. */
    66 #define PRIi "u"        /**< Format for index_t. */
    6763
    6864#define PRId8 "d"       /**< Format for int8_t. */

  • kernel/arch/ia32/src/ddi/ddi.c

    r69e68e3 r98000fb  
    5858int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
    5959{
    60         count_t bits;
     60        size_t bits;
    6161
    6262        bits = ioaddr + size;
    … …  
    100100         * Enable the range and we are done.
    101101         */
    102         bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
     102        bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, (size_t) size);
    103103
    104104        /*
    … …  
    119119void io_perm_bitmap_install(void)
    120120{
    121         count_t bits;
     121        size_t bits;
    122122        ptr_16_32_t cpugdtr;
    123123        descriptor_t *gdt_p;
    124         count_t ver;
     124        size_t ver;
    125125
    126126        /* First, copy the I/O Permission Bitmap. */

  • kernel/arch/ia32/src/interrupt.c

    r69e68e3 r98000fb  
    102102{
    103103        if (TASK) {
    104                 count_t ver;
     104                size_t ver;
    105105               
    106106                spinlock_lock(&TASK->lock);

  • kernel/arch/ia32/src/mm/frame.c

    r69e68e3 r98000fb  
    7171#endif
    7272                pfn_t pfn;
    73                 count_t count;
     73                size_t count;
    7474               
    7575                if (e820table[i].type == MEMMAP_MEMORY_AVAILABLE) {

  • kernel/arch/ia32/src/mm/tlb.c

    r69e68e3 r98000fb  
    6060 * @param cnt Number of entries to invalidate.
    6161 */
    62 void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt)
     62void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt)
    6363{
    6464        unsigned int i;

  • kernel/arch/ia32/src/smp/mps.c

    r69e68e3 r98000fb  
    8787 * Implementation of IA-32 SMP configuration interface.
    8888 */
    89 static count_t get_cpu_count(void);
    90 static bool is_cpu_enabled(index_t i);
    91 static bool is_bsp(index_t i);
    92 static uint8_t get_cpu_apic_id(index_t i);
     89static size_t get_cpu_count(void);
     90static bool is_cpu_enabled(size_t i);
     91static bool is_bsp(size_t i);
     92static uint8_t get_cpu_apic_id(size_t i);
    9393static int mps_irq_to_pin(unsigned int irq);
    9494
    … …  
    101101};
    102102
    103 count_t get_cpu_count(void)
     103size_t get_cpu_count(void)
    104104{
    105105        return processor_entry_cnt;
    106106}
    107107
    108 bool is_cpu_enabled(index_t i)
     108bool is_cpu_enabled(size_t i)
    109109{
    110110        ASSERT(i < processor_entry_cnt);
    … …  
    112112}
    113113
    114 bool is_bsp(index_t i)
     114bool is_bsp(size_t i)
    115115{
    116116        ASSERT(i < processor_entry_cnt);
    … …  
    118118}
    119119
    120 uint8_t get_cpu_apic_id(index_t i)
     120uint8_t get_cpu_apic_id(size_t i)
    121121{
    122122        ASSERT(i < processor_entry_cnt);

  • kernel/arch/ia64/include/mm/page.h

    r69e68e3 r98000fb  
    241241 * @return Current contents of rr[i].
    242242 */
    243 static inline uint64_t rr_read(index_t i)
     243static inline uint64_t rr_read(size_t i)
    244244{
    245245        uint64_t ret;
    … …  
    254254 * @param v Value to be written to rr[i].
    255255 */
    256 static inline void rr_write(index_t i, uint64_t v)
     256static inline void rr_write(size_t i, uint64_t v)
    257257{
    258258        ASSERT(i < REGION_REGISTERS);

  • kernel/arch/ia64/include/mm/tlb.h

    r69e68e3 r98000fb  
    7777extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
    7878
    79 extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr);
    80 extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr);
    81 extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr);
     79extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr);
     80extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
     81extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
    8282
    83 extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, index_t tr);
    84 extern void dtr_purge(uintptr_t page, count_t width);
     83extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr);
     84extern void dtr_purge(uintptr_t page, size_t width);
    8585
    8686extern void dtc_pte_copy(pte_t *t);

  • kernel/arch/ia64/include/types.h

    r69e68e3 r98000fb  
    5555
    5656typedef uint64_t size_t;
    57 typedef uint64_t count_t;
    58 typedef uint64_t index_t;
    5957
    6058typedef uint64_t uintptr_t;
    … …  
    7371#define PRIp "lx"       /**< Format for uintptr_t. */
    7472#define PRIs "lu"       /**< Format for size_t. */
    75 #define PRIc "lu"       /**< Format for count_t. */
    76 #define PRIi "lu"       /**< Format for index_t. */
    7773
    7874#define PRId8 "d"       /**< Format for int8_t. */

  • kernel/arch/ia64/src/mm/page.c

    r69e68e3 r98000fb  
    132132{
    133133        region_register rr_save, rr;
    134         index_t vrn;
     134        size_t vrn;
    135135        rid_t rid;
    136136        vhpt_entry_t *v;
    … …  
    177177{
    178178        region_register rr_save, rr;   
    179         index_t vrn;
     179        size_t vrn;
    180180        rid_t rid;
    181181        bool match;
    … …  
    224224{
    225225        region_register rr_save, rr;   
    226         index_t vrn;
     226        size_t vrn;
    227227        rid_t rid;
    228228        uint64_t tag;

  • kernel/arch/ia64/src/mm/tlb.c

    r69e68e3 r98000fb  
    101101
    102102
    103 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
     103void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
    104104{
    105105        region_register rr;
    … …  
    268268 */
    269269void
    270 itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
     270itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr)
    271271{
    272272        tr_mapping_insert(va, asid, entry, false, tr);
    … …  
    282282 */
    283283void
    284 dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
     284dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr)
    285285{
    286286        tr_mapping_insert(va, asid, entry, true, tr);
    … …  
    299299void
    300300tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr,
    301     index_t tr)
     301    size_t tr)
    302302{
    303303        region_register rr;
    … …  
    354354void
    355355dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr,
    356     index_t tr)
     356    size_t tr)
    357357{
    358358        tlb_entry_t entry;
    … …  
    383383 * @param width         Width of the purge in bits.
    384384 */
    385 void dtr_purge(uintptr_t page, count_t width)
     385void dtr_purge(uintptr_t page, size_t width)
    386386{
    387387        asm volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width << 2));

  • kernel/arch/ia64/src/mm/vhpt.c

    r69e68e3 r98000fb  
    5454{
    5555        region_register rr_save, rr;
    56         index_t vrn;
     56        size_t vrn;
    5757        rid_t rid;
    5858        uint64_t tag;

  • kernel/arch/mips32/include/arch.h

    r69e68e3 r98000fb  
    4343#include <typedefs.h>
    4444
    45 extern count_t cpu_count;
     45extern size_t cpu_count;
    4646
    4747typedef struct {

  • kernel/arch/mips32/include/debugger.h

    r69e68e3 r98000fb  
    5454        unative_t nextinstruction;  /**< Original instruction following break */
    5555        int flags;        /**< Flags regarding breakpoint */
    56         count_t counter;
     56        size_t counter;
    5757        void (*bkfunc)(void *b, istate_t *istate);
    5858} bpinfo_t;

  • kernel/arch/mips32/include/mm/page.h

    r69e68e3 r98000fb  
    113113/* Get PTE flags accessors for each level. */
    114114#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    115         get_pt_flags((pte_t *) (ptl0), (index_t) (i))
     115        get_pt_flags((pte_t *) (ptl0), (size_t) (i))
    116116#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    117117        PAGE_PRESENT
    … …  
    119119        PAGE_PRESENT
    120120#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    121         get_pt_flags((pte_t *) (ptl3), (index_t) (i))
     121        get_pt_flags((pte_t *) (ptl3), (size_t) (i))
    122122
    123123/* Set PTE flags accessors for each level. */
    124124#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    125         set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
     125        set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
    126126#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    127127#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
    128128#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    129         set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
     129        set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
    130130
    131131/* Last-level info macros. */
    … …  
    141141#include <arch/exception.h>
    142142
    143 static inline int get_pt_flags(pte_t *pt, index_t i)
     143static inline int get_pt_flags(pte_t *pt, size_t i)
    144144{
    145145        pte_t *p = &pt[i];
    … …  
    154154}
    155155
    156 static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
     156static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    157157{
    158158        pte_t *p = &pt[i];

  • kernel/arch/mips32/include/types.h

    r69e68e3 r98000fb  
    4747
    4848typedef uint32_t size_t;
    49 typedef uint32_t count_t;
    50 typedef uint32_t index_t;
    5149
    5250typedef uint32_t uintptr_t;
    … …  
    6361#define PRIp "x"        /**< Format for uintptr_t. */
    6462#define PRIs "u"        /**< Format for size_t. */
    65 #define PRIc "u"        /**< Format for count_t. */
    66 #define PRIi "u"        /**< Format for index_t. */
    6763
    6864#define PRId8 "d"       /**< Format for int8_t. */

  • kernel/arch/mips32/src/mips32.c

    r69e68e3 r98000fb  
    7777uintptr_t supervisor_sp __attribute__ ((section (".text")));
    7878
    79 count_t cpu_count = 0;
     79size_t cpu_count = 0;
    8080
    8181/** Performs mips32-specific initialization before main_bsp() is called. */
    … …  
    8585        init.cnt = bootinfo->cnt;
    8686       
    87         count_t i;
     87        size_t i;
    8888        for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
    8989                init.tasks[i].addr = bootinfo->tasks[i].addr;

  • kernel/arch/mips32/src/mm/frame.c

    r69e68e3 r98000fb  
    6363} phys_region_t;
    6464
    65 static count_t phys_regions_count = 0;
     65static size_t phys_regions_count = 0;
    6666static phys_region_t phys_regions[MAX_REGIONS];
    6767
    … …  
    120120        /* Init tasks */
    121121        bool safe = true;
    122         count_t i;
     122        size_t i;
    123123        for (i = 0; i < init.cnt; i++)
    124124                if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
    … …  
    175175        cp0_entry_hi_write(0);
    176176
    177         count_t i;
     177        size_t i;
    178178        for (i = 0; i < TLB_ENTRY_COUNT; i++) {
    179179                cp0_index_write(i);
    … …  
    252252        printf("---------- ----------\n");
    253253       
    254         count_t i;
     254        size_t i;
    255255        for (i = 0; i < phys_regions_count; i++) {
    256256                printf("%#010x %10u\n",

  • kernel/arch/mips32/src/mm/tlb.c

    r69e68e3 r98000fb  
    561561 * @param cnt           Number of entries to invalidate.
    562562 */
    563 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
     563void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
    564564{
    565565        unsigned int i;

  • kernel/arch/ppc32/include/mm/page.h

    r69e68e3 r98000fb  
    103103/* Get PTE flags accessors for each level. */
    104104#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    105         get_pt_flags((pte_t *) (ptl0), (index_t) (i))
     105        get_pt_flags((pte_t *) (ptl0), (size_t) (i))
    106106#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    107107        PAGE_PRESENT
    … …  
    109109        PAGE_PRESENT
    110110#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    111         get_pt_flags((pte_t *) (ptl3), (index_t) (i))
     111        get_pt_flags((pte_t *) (ptl3), (size_t) (i))
    112112
    113113/* Set PTE flags accessors for each level. */
    114114#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    115         set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
     115        set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
    116116#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    117117#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
    118118#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    119         set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
     119        set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
    120120
    121121/* Macros for querying the last-level PTEs. */
    … …  
    131131#include <arch/interrupt.h>
    132132
    133 static inline int get_pt_flags(pte_t *pt, index_t i)
     133static inline int get_pt_flags(pte_t *pt, size_t i)
    134134{
    135135        pte_t *p = &pt[i];
    … …  
    144144}
    145145
    146 static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
     146static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    147147{
    148148        pte_t *p = &pt[i];

  • kernel/arch/ppc32/include/types.h

    r69e68e3 r98000fb  
    4747
    4848typedef uint32_t size_t;
    49 typedef uint32_t count_t;
    50 typedef uint32_t index_t;
    5149
    5250typedef uint32_t uintptr_t;
    … …  
    6159} fncptr_t;
    6260
    63 /**< Formats for uintptr_t, size_t, count_t and index_t */
     61/**< Formats for uintptr_t, size_t */
    6462#define PRIp "x"
    6563#define PRIs "u"
    66 #define PRIc "u"
    67 #define PRIi "u"
    6864
    6965/**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */

  • kernel/arch/ppc32/src/mm/frame.c

    r69e68e3 r98000fb  
    5858{
    5959        pfn_t minconf = 2;
    60         count_t i;
     60        size_t i;
    6161        pfn_t start, conf;
    6262        size_t size;

  • kernel/arch/ppc32/src/mm/tlb.c

    r69e68e3 r98000fb  
    550550
    551551
    552 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
     552void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
    553553{
    554554        // TODO

  • kernel/arch/sparc64/include/mm/tlb.h

    r69e68e3 r98000fb  
    323323 *                      Register.
    324324 */
    325 static inline uint64_t itlb_data_access_read(index_t entry)
     325static inline uint64_t itlb_data_access_read(size_t entry)
    326326{
    327327        itlb_data_access_addr_t reg;
    … …  
    337337 * @param value         Value to be written.
    338338 */
    339 static inline void itlb_data_access_write(index_t entry, uint64_t value)
     339static inline void itlb_data_access_write(size_t entry, uint64_t value)
    340340{
    341341        itlb_data_access_addr_t reg;
    … …  
    354354 *                      Register.
    355355 */
    356 static inline uint64_t dtlb_data_access_read(index_t entry)
     356static inline uint64_t dtlb_data_access_read(size_t entry)
    357357{
    358358        dtlb_data_access_addr_t reg;
    … …  
    368368 * @param value         Value to be written.
    369369 */
    370 static inline void dtlb_data_access_write(index_t entry, uint64_t value)
     370static inline void dtlb_data_access_write(size_t entry, uint64_t value)
    371371{
    372372        dtlb_data_access_addr_t reg;
    … …  
    384384 * @return              Current value of specified IMMU TLB Tag Read Register.
    385385 */
    386 static inline uint64_t itlb_tag_read_read(index_t entry)
     386static inline uint64_t itlb_tag_read_read(size_t entry)
    387387{
    388388        itlb_tag_read_addr_t tag;
    … …  
    399399 * @return              Current value of specified DMMU TLB Tag Read Register.
    400400 */
    401 static inline uint64_t dtlb_tag_read_read(index_t entry)
     401static inline uint64_t dtlb_tag_read_read(size_t entry)
    402402{
    403403        dtlb_tag_read_addr_t tag;
    … …  
    419419 *                      Register.
    420420 */
    421 static inline uint64_t itlb_data_access_read(int tlb, index_t entry)
     421static inline uint64_t itlb_data_access_read(int tlb, size_t entry)
    422422{
    423423        itlb_data_access_addr_t reg;
    … …  
    434434 * @param value         Value to be written.
    435435 */
    436 static inline void itlb_data_access_write(int tlb, index_t entry,
     436static inline void itlb_data_access_write(int tlb, size_t entry,
    437437        uint64_t value)
    438438{
    … …  
    454454 *                      Register.
    455455 */
    456 static inline uint64_t dtlb_data_access_read(int tlb, index_t entry)
     456static inline uint64_t dtlb_data_access_read(int tlb, size_t entry)
    457457{
    458458        dtlb_data_access_addr_t reg;
    … …  
    470470 * @param value         Value to be written.
    471471 */
    472 static inline void dtlb_data_access_write(int tlb, index_t entry,
     472static inline void dtlb_data_access_write(int tlb, size_t entry,
    473473        uint64_t value)
    474474{
    … …  
    489489 * @return              Current value of specified IMMU TLB Tag Read Register.
    490490 */
    491 static inline uint64_t itlb_tag_read_read(int tlb, index_t entry)
     491static inline uint64_t itlb_tag_read_read(int tlb, size_t entry)
    492492{
    493493        itlb_tag_read_addr_t tag;
    … …  
    506506 * @return              Current value of specified DMMU TLB Tag Read Register.
    507507 */
    508 static inline uint64_t dtlb_tag_read_read(int tlb, index_t entry)
     508static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry)
    509509{
    510510        dtlb_tag_read_addr_t tag;

  • kernel/arch/sparc64/include/mm/tsb.h

    r69e68e3 r98000fb  
    161161struct pte;
    162162
    163 extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages);
    164 extern void itsb_pte_copy(struct pte *t, index_t index);
    165 extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro);
     163extern void tsb_invalidate(struct as *as, uintptr_t page, size_t pages);
     164extern void itsb_pte_copy(struct pte *t, size_t index);
     165extern void dtsb_pte_copy(struct pte *t, size_t index, bool ro);
    166166
    167167#endif /* !def __ASM__ */

  • kernel/arch/sparc64/include/types.h

    r69e68e3 r98000fb  
    4747
    4848typedef uint64_t size_t;
    49 typedef uint64_t count_t;
    50 typedef uint64_t index_t;
    5149
    5250typedef uint64_t uintptr_t;
    … …  
    6159} fncptr_t;
    6260
    63 /**< Formats for uintptr_t, size_t, count_t and index_t */
     61/**< Formats for uintptr_t, size_t */
    6462#define PRIp "llx"
    6563#define PRIs "llu"
    66 #define PRIc "llu"
    67 #define PRIi "llu"
    6864
    6965/**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */

  • kernel/arch/sparc64/src/drivers/fhc.c

    r69e68e3 r98000fb  
    7272                return NULL;
    7373               
    74         count_t regs = prop->size / sizeof(ofw_central_reg_t);
     74        size_t regs = prop->size / sizeof(ofw_central_reg_t);
    7575        if (regs + 1 < UART_IMAP_REG)
    7676                return NULL;

  • kernel/arch/sparc64/src/drivers/pci.c

    r69e68e3 r98000fb  
    9292
    9393        ofw_upa_reg_t *reg = prop->value;
    94         count_t regs = prop->size / sizeof(ofw_upa_reg_t);
     94        size_t regs = prop->size / sizeof(ofw_upa_reg_t);
    9595
    9696        if (regs < SABRE_INTERNAL_REG + 1)
    … …  
    139139
    140140        ofw_upa_reg_t *reg = prop->value;
    141         count_t regs = prop->size / sizeof(ofw_upa_reg_t);
     141        size_t regs = prop->size / sizeof(ofw_upa_reg_t);
    142142
    143143        if (regs < PSYCHO_INTERNAL_REG + 1)

  • kernel/arch/sparc64/src/mm/as.c

    r69e68e3 r98000fb  
    9090         * size.
    9191         */
    92         count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     92        size_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
    9393            sizeof(tsb_entry_t)) >> FRAME_WIDTH;
    9494        frame_free(KA2PA((uintptr_t) as->arch.itsb));
    … …  
    102102{
    103103#ifdef CONFIG_TSB
    104         tsb_invalidate(as, 0, (count_t) -1);
     104        tsb_invalidate(as, 0, (size_t) -1);
    105105#endif
    106106        return 0;

  • kernel/arch/sparc64/src/mm/tlb.c

    r69e68e3 r98000fb  
    5555#endif
    5656
    57 static void dtlb_pte_copy(pte_t *, index_t, bool);
    58 static void itlb_pte_copy(pte_t *, index_t);
     57static void dtlb_pte_copy(pte_t *, size_t, bool);
     58static void itlb_pte_copy(pte_t *, size_t);
    5959static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
    6060static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
    … …  
    131131 *                      of its w field.
    132132 */
    133 void dtlb_pte_copy(pte_t *t, index_t index, bool ro)
     133void dtlb_pte_copy(pte_t *t, size_t index, bool ro)
    134134{
    135135        tlb_tag_access_reg_t tag;
    … …  
    168168 * @param index         Zero if lower 8K-subpage, one if higher 8K-subpage.
    169169 */
    170 void itlb_pte_copy(pte_t *t, index_t index)
     170void itlb_pte_copy(pte_t *t, size_t index)
    171171{
    172172        tlb_tag_access_reg_t tag;
    … …  
    201201{
    202202        uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
    203         index_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
     203        size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
    204204        pte_t *t;
    205205
    … …  
    246246        uintptr_t page_8k;
    247247        uintptr_t page_16k;
    248         index_t index;
     248        size_t index;
    249249        pte_t *t;
    250250
    … …  
    310310{
    311311        uintptr_t page_16k;
    312         index_t index;
     312        size_t index;
    313313        pte_t *t;
    314314
    … …  
    580580 * @param cnt           Number of ITLB and DTLB entries to invalidate.
    581581 */
    582 void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
     582void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
    583583{
    584584        unsigned int i;

  • kernel/arch/sparc64/src/mm/tsb.c

    r69e68e3 r98000fb  
    5151 * @param as Address space.
    5252 * @param page First page to invalidate in TSB.
    53  * @param pages Number of pages to invalidate. Value of (count_t) -1 means the
     53 * @param pages Number of pages to invalidate. Value of (size_t) -1 means the
    5454 *      whole TSB.
    5555 */
    56 void tsb_invalidate(as_t *as, uintptr_t page, count_t pages)
     56void tsb_invalidate(as_t *as, uintptr_t page, size_t pages)
    5757{
    58         index_t i0, i;
    59         count_t cnt;
     58        size_t i0;
     59        size_t i;
     60        size_t cnt;
    6061       
    6162        ASSERT(as->arch.itsb && as->arch.dtsb);
    … …  
    6465        ASSERT(i0 < ITSB_ENTRY_COUNT && i0 < DTSB_ENTRY_COUNT);
    6566
    66         if (pages == (count_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT)
     67        if (pages == (size_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT)
    6768                cnt = ITSB_ENTRY_COUNT;
    6869        else
    … …  
    8283 * @param index Zero if lower 8K-subpage, one if higher 8K subpage.
    8384 */
    84 void itsb_pte_copy(pte_t *t, index_t index)
     85void itsb_pte_copy(pte_t *t, size_t index)
    8586{
    8687        as_t *as;
    8788        tsb_entry_t *tsb;
    88         index_t entry;
     89        size_t entry;
    8990
    9091        ASSERT(index <= 1);
    … …  
    128129 * @param ro    If true, the mapping is copied read-only.
    129130 */
    130 void dtsb_pte_copy(pte_t *t, index_t index, bool ro)
     131void dtsb_pte_copy(pte_t *t, size_t index, bool ro)
    131132{
    132133        as_t *as;
    133134        tsb_entry_t *tsb;
    134         index_t entry;
     135        size_t entry;
    135136       
    136137        ASSERT(index <= 1);

  • kernel/arch/sparc64/src/smp/smp.c

    r69e68e3 r98000fb  
    6262{
    6363        ofw_tree_node_t *node;
    64         count_t cnt = 0;
     64        size_t cnt = 0;
    6565       
    6666        if (is_us() || is_us_iii()) {
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