Changeset 96b02eb9 in mainline for kernel/arch/amd64
- Timestamp:
- 2010-12-14T12:52:38Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 6b10dab
- Parents:
- 554debd
- Location:
- kernel/arch/amd64
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/include/asm.h
r554debd r96b02eb9 304 304 } 305 305 306 NO_TRACE static inline unative_t read_msr(uint32_t msr)306 NO_TRACE static inline sysarg_t read_msr(uint32_t msr) 307 307 { 308 308 uint32_t ax, dx; … … 343 343 asm volatile ( 344 344 "invlpg %[addr]\n" 345 :: [addr] "m" (*(( unative_t *) addr))345 :: [addr] "m" (*((sysarg_t *) addr)) 346 346 ); 347 347 } … … 398 398 } 399 399 400 #define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \400 #define GEN_READ_REG(reg) NO_TRACE static inline sysarg_t read_ ##reg (void) \ 401 401 { \ 402 unative_t res; \402 sysarg_t res; \ 403 403 asm volatile ( \ 404 404 "movq %%" #reg ", %[res]" \ … … 408 408 } 409 409 410 #define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg ( unative_t regn) \410 #define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (sysarg_t regn) \ 411 411 { \ 412 412 asm volatile ( \ -
kernel/arch/amd64/include/proc/thread.h
r554debd r96b02eb9 41 41 42 42 typedef struct { 43 unative_t tls;43 sysarg_t tls; 44 44 /** User and kernel RSP for syscalls. */ 45 45 uint64_t syscall_rsp[2]; -
kernel/arch/amd64/include/types.h
r554debd r96b02eb9 43 43 typedef uint64_t ipl_t; 44 44 45 typedef uint64_t unative_t;45 typedef uint64_t sysarg_t; 46 46 typedef int64_t native_t; 47 47 typedef uint64_t atomic_count_t; … … 54 54 55 55 #define PRIdn PRId64 /**< Format for native_t. */ 56 #define PRIun PRIu64 /**< Format for unative_t. */57 #define PRIxn PRIx64 /**< Format for hexadecimal unative_t. */56 #define PRIun PRIu64 /**< Format for sysarg_t. */ 57 #define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ 58 58 #define PRIua PRIu64 /**< Format for atomic_count_t. */ 59 59 -
kernel/arch/amd64/src/amd64.c
r554debd r96b02eb9 256 256 * we need not to go to CPL0 to read it. 257 257 */ 258 unative_t sys_tls_set(unative_t addr)258 sysarg_t sys_tls_set(sysarg_t addr) 259 259 { 260 260 THREAD->arch.tls = addr; -
kernel/arch/amd64/src/debugger.c
r554debd r96b02eb9 125 125 126 126 /* Disable breakpoint in DR7 */ 127 unative_t dr7 = read_dr7();127 sysarg_t dr7 = read_dr7(); 128 128 dr7 &= ~(0x02U << (curidx * 2)); 129 129 … … 152 152 if (!(flags & BKPOINT_INSTR)) { 153 153 #ifdef __32_BITS__ 154 dr7 |= (( unative_t) 0x03U) << (18 + 4 * curidx);154 dr7 |= ((sysarg_t) 0x03U) << (18 + 4 * curidx); 155 155 #endif 156 156 157 157 #ifdef __64_BITS__ 158 dr7 |= (( unative_t) 0x02U) << (18 + 4 * curidx);158 dr7 |= ((sysarg_t) 0x02U) << (18 + 4 * curidx); 159 159 #endif 160 160 161 161 if ((flags & BKPOINT_WRITE)) 162 dr7 |= (( unative_t) 0x01U) << (16 + 4 * curidx);162 dr7 |= ((sysarg_t) 0x01U) << (16 + 4 * curidx); 163 163 else if ((flags & BKPOINT_READ_WRITE)) 164 dr7 |= (( unative_t) 0x03U) << (16 + 4 * curidx);164 dr7 |= ((sysarg_t) 0x03U) << (16 + 4 * curidx); 165 165 } 166 166 … … 227 227 if (!(breakpoints[slot].flags & BKPOINT_INSTR)) { 228 228 if ((breakpoints[slot].flags & BKPOINT_CHECK_ZERO)) { 229 if (*(( unative_t *) breakpoints[slot].address) != 0)229 if (*((sysarg_t *) breakpoints[slot].address) != 0) 230 230 return; 231 231 … … 234 234 } else { 235 235 printf("Data watchpoint - new data: %#" PRIxn "\n", 236 *(( unative_t *) breakpoints[slot].address));236 *((sysarg_t *) breakpoints[slot].address)); 237 237 } 238 238 } … … 279 279 #endif 280 280 281 unative_t dr6 = read_dr6();281 sysarg_t dr6 = read_dr6(); 282 282 283 283 unsigned int i; … … 384 384 int cmd_del_breakpoint(cmd_arg_t *argv) 385 385 { 386 unative_t bpno = argv->intval;386 sysarg_t bpno = argv->intval; 387 387 if (bpno > BKPOINTS_MAX) { 388 388 printf("Invalid breakpoint number.\n");
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