Changeset 38b0ae2 in mainline for kernel/genarch/include/genarch/drivers/ns16550/ns16550.h

Timestamp:

2018-02-12T20:16:44Z (7 years ago)

Author:

GitHub <noreply@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

448e093

Parents:

8192d8a

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-12 20:16:44)

git-committer:

GitHub <noreply@…> (2018-02-12 20:16:44)

Message:

Generalize ns16550 driver to work with more chips. (#20)

Some UART controllers are compatible with 16550A, but have more spacing
between registers. In particular, ARMADA 385, which is the basis of
Turris Omnia router, has a compatible UART with 32b registers instead of 8b
(with the top three bytes unused).

Note: The device tree file hints that some UARTs may need register reads/writes
that are wider than 8 bits, and this commit does not address that possibility.

File:

• kernel/genarch/include/genarch/drivers/ns16550/ns16550.h (modified) (1 diff)

kernel/genarch/include/genarch/drivers/ns16550/ns16550.h

@@ -50 +50 @@
 
 /** NS16550 registers. */
-typedef struct {
-        union {
-                ioport8_t rbr;      /**< Receiver Buffer Register (read). */
-                ioport8_t thr;      /**< Transmitter Holder Register (write). */
-        } __attribute__ ((packed));
-        ioport8_t ier;      /**< Interrupt Enable Register. */
-        union {
-                ioport8_t iir;  /**< Interrupt Ident Register (read). */
-                ioport8_t fcr;  /**< FIFO control register (write). */
-        } __attribute__ ((packed));
-        ioport8_t lcr;      /**< Line Control register. */
-        ioport8_t mcr;      /**< Modem Control Register. */
-        ioport8_t lsr;      /**< Line Status Register. */
-} __attribute__ ((packed)) ns16550_t;
+enum {
+        NS16550_REG_RBR = 0,  /**< Receiver Buffer Register (read). */
+        NS16550_REG_THR = 0,  /**< Transmitter Holder Register (write). */
+        NS16550_REG_IER = 1,  /**< Interrupt Enable Register. */
+        NS16550_REG_IIR = 2,  /**< Interrupt Ident Register (read). */
+        NS16550_REG_FCR = 2,  /**< FIFO control register (write). */
+        NS16550_REG_LCR = 3,  /**< Line Control register. */
+        NS16550_REG_MCR = 4,  /**< Modem Control Register. */
+        NS16550_REG_LSR = 5,  /**< Line Status Register. */
+};
 
 /** Structure representing the ns16550 device. */
 typedef struct {
         irq_t irq;
-        ns16550_t *ns16550;
+        volatile ioport8_t *ns16550;
         indev_t *input;
         outdev_t *output;
         parea_t parea;
+        int reg_shift;
 } ns16550_instance_t;
 
-extern ns16550_instance_t *ns16550_init(ns16550_t *, inr_t, cir_t, void *,
+extern ns16550_instance_t *ns16550_init(ioport8_t *, int, inr_t, cir_t, void *,
     outdev_t **);
 extern void ns16550_wire(ns16550_instance_t *, indev_t *);