source: mainline/kernel/genarch/include/genarch/drivers/ns16550/ns16550.h@ 38b0ae2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 38b0ae2 was 38b0ae2, checked in by GitHub <noreply@…>, 8 years ago

Generalize ns16550 driver to work with more chips. (#20)

Some UART controllers are compatible with 16550A, but have more spacing
between registers. In particular, ARMADA 385, which is the basis of
Turris Omnia router, has a compatible UART with 32b registers instead of 8b
(with the top three bytes unused).

Note: The device tree file hints that some UARTs may need register reads/writes
that are wider than 8 bits, and this commit does not address that possibility.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup genarch
30 * @{
31 */
32/**
33 * @file
34 * @brief Headers for NS 16550 serial controller.
35 */
36
37#ifndef KERN_NS16550_H_
38#define KERN_NS16550_H_
39
40#include <ddi/ddi.h>
41#include <ddi/irq.h>
42#include <typedefs.h>
43#include <console/chardev.h>
44
45#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */
46
47#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */
48
49#define MCR_OUT2 0x08 /** OUT2. */
50
51/** NS16550 registers. */
52enum {
53 NS16550_REG_RBR = 0, /**< Receiver Buffer Register (read). */
54 NS16550_REG_THR = 0, /**< Transmitter Holder Register (write). */
55 NS16550_REG_IER = 1, /**< Interrupt Enable Register. */
56 NS16550_REG_IIR = 2, /**< Interrupt Ident Register (read). */
57 NS16550_REG_FCR = 2, /**< FIFO control register (write). */
58 NS16550_REG_LCR = 3, /**< Line Control register. */
59 NS16550_REG_MCR = 4, /**< Modem Control Register. */
60 NS16550_REG_LSR = 5, /**< Line Status Register. */
61};
62
63/** Structure representing the ns16550 device. */
64typedef struct {
65 irq_t irq;
66 volatile ioport8_t *ns16550;
67 indev_t *input;
68 outdev_t *output;
69 parea_t parea;
70 int reg_shift;
71} ns16550_instance_t;
72
73extern ns16550_instance_t *ns16550_init(ioport8_t *, int, inr_t, cir_t, void *,
74 outdev_t **);
75extern void ns16550_wire(ns16550_instance_t *, indev_t *);
76
77#endif
78
79/** @}
80 */
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