| 1 | #include <errno.h>
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| 2 | #include <usb/debug.h>
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| 3 | #include <usb/usb.h>
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| 4 |
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| 5 | #include "utils/malloc32.h"
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| 6 |
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| 7 | #include "debug.h"
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| 8 | #include "name.h"
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| 9 | #include "uhci.h"
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| 10 |
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| 11 | static int uhci_init_transfer_lists(transfer_list_t list[]);
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| 12 | static int uhci_clean_finished(void *arg);
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| 13 | static int uhci_debug_checker(void *arg);
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| 14 |
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| 15 | int uhci_init(device_t *device, void *regs, size_t reg_size)
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| 16 | {
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| 17 | assert(device);
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| 18 | uhci_print_info("Initializing device at address %p.\n", device);
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| 19 |
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| 20 | #define CHECK_RET_FREE_INSTANCE(message...) \
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| 21 | if (ret != EOK) { \
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| 22 | uhci_print_error(message); \
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| 23 | if (instance) { \
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| 24 | free(instance); \
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| 25 | } \
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| 26 | return ret; \
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| 27 | } else (void) 0
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| 28 |
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| 29 | /* create instance */
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| 30 | uhci_t *instance = malloc(sizeof(uhci_t));
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| 31 | int ret = instance ? EOK : ENOMEM;
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| 32 | CHECK_RET_FREE_INSTANCE("Failed to allocate uhci driver instance.\n");
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| 33 |
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| 34 | bzero(instance, sizeof(uhci_t));
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| 35 |
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| 36 | /* init address keeper(libusb) */
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| 37 | usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX);
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| 38 | uhci_print_verbose("Initialized address manager.\n");
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| 39 |
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| 40 | /* allow access to hc control registers */
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| 41 | regs_t *io;
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| 42 | assert(reg_size >= sizeof(regs_t));
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| 43 | ret = pio_enable(regs, reg_size, (void**)&io);
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| 44 | CHECK_RET_FREE_INSTANCE("Failed to gain access to registers at %p.\n", io);
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| 45 | instance->registers = io;
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| 46 | uhci_print_verbose("Device registers accessible.\n");
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| 47 |
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| 48 | /* init transfer lists */
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| 49 | ret = uhci_init_transfer_lists(instance->transfers);
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| 50 | CHECK_RET_FREE_INSTANCE("Failed to initialize transfer lists.\n");
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| 51 | uhci_print_verbose("Transfer lists initialized.\n");
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| 52 |
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| 53 |
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| 54 | uhci_print_verbose("Initializing frame list.\n");
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| 55 | instance->frame_list = get_page();
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| 56 | ret = instance ? EOK : ENOMEM;
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| 57 | CHECK_RET_FREE_INSTANCE("Failed to get frame list page.\n");
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| 58 |
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| 59 | /* initialize all frames to point to the first queue head */
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| 60 | unsigned i = 0;
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| 61 | const uint32_t queue =
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| 62 | instance->transfers[USB_TRANSFER_INTERRUPT].queue_head_pa
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| 63 | | LINK_POINTER_QUEUE_HEAD_FLAG;
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| 64 | for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
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| 65 | instance->frame_list[i] = queue;
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| 66 | }
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| 67 |
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| 68 | const uintptr_t pa = (uintptr_t)addr_to_phys(instance->frame_list);
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| 69 |
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| 70 | pio_write_32(&instance->registers->flbaseadd, (uint32_t)pa);
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| 71 |
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| 72 | instance->cleaner = fibril_create(uhci_clean_finished, instance);
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| 73 | fibril_add_ready(instance->cleaner);
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| 74 |
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| 75 | instance->debug_checker = fibril_create(uhci_debug_checker, instance);
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| 76 | fibril_add_ready(instance->debug_checker);
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| 77 |
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| 78 | uhci_print_verbose("Starting UHCI HC.\n");
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| 79 | pio_write_16(&instance->registers->usbcmd, UHCI_CMD_RUN_STOP);
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| 80 | /*
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| 81 | uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
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| 82 | cmd |= UHCI_CMD_DEBUG;
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| 83 | pio_write_16(&instance->registers->usbcmd, cmd);
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| 84 | */
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| 85 | device->driver_data = instance;
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| 86 | return EOK;
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| 87 | }
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| 88 | /*----------------------------------------------------------------------------*/
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| 89 | int uhci_init_transfer_lists(transfer_list_t transfers[])
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| 90 | {
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| 91 | //TODO:refactor
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| 92 | transfers[USB_TRANSFER_ISOCHRONOUS].first = NULL;
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| 93 | transfers[USB_TRANSFER_ISOCHRONOUS].last = NULL;
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| 94 |
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| 95 | int ret;
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| 96 | ret = transfer_list_init(&transfers[USB_TRANSFER_BULK], NULL);
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| 97 | if (ret != EOK) {
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| 98 | uhci_print_error("Failed to initialize bulk queue.\n");
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| 99 | return ret;
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| 100 | }
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| 101 |
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| 102 | ret = transfer_list_init(
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| 103 | &transfers[USB_TRANSFER_CONTROL], &transfers[USB_TRANSFER_BULK]);
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| 104 | if (ret != EOK) {
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| 105 | uhci_print_error("Failed to initialize control queue.\n");
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| 106 | transfer_list_fini(&transfers[USB_TRANSFER_BULK]);
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| 107 | return ret;
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| 108 | }
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| 109 |
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| 110 | ret = transfer_list_init(
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| 111 | &transfers[USB_TRANSFER_INTERRUPT], &transfers[USB_TRANSFER_CONTROL]);
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| 112 | if (ret != EOK) {
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| 113 | uhci_print_error("Failed to initialize interrupt queue.\n");
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| 114 | transfer_list_fini(&transfers[USB_TRANSFER_CONTROL]);
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| 115 | transfer_list_fini(&transfers[USB_TRANSFER_BULK]);
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| 116 | return ret;
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| 117 | }
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| 118 |
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| 119 | return EOK;
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| 120 | }
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| 121 | /*----------------------------------------------------------------------------*/
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| 122 | int uhci_transfer(
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| 123 | device_t *dev,
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| 124 | usb_target_t target,
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| 125 | usb_transfer_type_t transfer_type,
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| 126 | bool toggle,
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| 127 | usb_packet_id pid,
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| 128 | void *buffer, size_t size,
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| 129 | usbhc_iface_transfer_out_callback_t callback_out,
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| 130 | usbhc_iface_transfer_in_callback_t callback_in,
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| 131 | void *arg )
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| 132 | {
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| 133 | // TODO: Add support for isochronous transfers
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| 134 | if (transfer_type == USB_TRANSFER_ISOCHRONOUS)
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| 135 | return ENOTSUP;
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| 136 |
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| 137 | if (size >= 1024)
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| 138 | return ENOTSUP;
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| 139 |
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| 140 | transfer_descriptor_t *td = NULL;
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| 141 | callback_t *job = NULL;
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| 142 | int ret = EOK;
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| 143 |
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| 144 | #define CHECK_RET_TRANS_FREE_JOB_TD(message) \
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| 145 | if (ret != EOK) { \
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| 146 | uhci_print_error(message); \
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| 147 | if (job) { \
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| 148 | callback_dispose(job); \
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| 149 | } \
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| 150 | if (td) { free32(td); } \
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| 151 | return ret; \
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| 152 | } else (void) 0
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| 153 |
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| 154 |
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| 155 | job = callback_get(dev, buffer, size, callback_in, callback_out, arg);
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| 156 | ret = job ? EOK : ENOMEM;
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| 157 | CHECK_RET_TRANS_FREE_JOB_TD("Failed to allocate callback structure.\n");
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| 158 |
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| 159 | td = transfer_descriptor_get(3, size, false, target, pid, job->new_buffer);
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| 160 | ret = td ? EOK : ENOMEM;
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| 161 | CHECK_RET_TRANS_FREE_JOB_TD("Failed to setup transfer descriptor.\n");
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| 162 |
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| 163 | td->callback = job;
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| 164 |
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| 165 | assert(dev);
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| 166 | uhci_t *instance = (uhci_t*)dev->driver_data;
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| 167 | assert(instance);
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| 168 |
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| 169 | uhci_print_verbose("Appending a new transfer to queue.\n");
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| 170 | ret = transfer_list_append(&instance->transfers[transfer_type], td);
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| 171 | CHECK_RET_TRANS_FREE_JOB_TD("Failed to append transfer descriptor.\n");
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| 172 |
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| 173 | return EOK;
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| 174 | }
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| 175 | /*---------------------------------------------------------------------------*/
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| 176 | int uhci_clean_finished(void* arg)
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| 177 | {
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| 178 | uhci_print_verbose("Started cleaning fibril.\n");
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| 179 | uhci_t *instance = (uhci_t*)arg;
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| 180 | assert(instance);
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| 181 |
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| 182 | while(1) {
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| 183 | uhci_print_verbose("Running cleaning fibril on: %p.\n", instance);
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| 184 | /* iterate all transfer queues */
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| 185 | int i = 0;
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| 186 | for (; i < TRANSFER_QUEUES; ++i) {
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| 187 | /* Remove inactive transfers from the top of the queue
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| 188 | * TODO: should I reach queue head or is this enough? */
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| 189 | volatile transfer_descriptor_t * it =
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| 190 | instance->transfers[i].first;
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| 191 | uhci_print_verbose("Running cleaning fibril on queue: %p (%s).\n",
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| 192 | &instance->transfers[i], it ? "SOMETHING" : "EMPTY");
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| 193 |
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| 194 | if (it)
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| 195 | uhci_print_verbose("First in queue: %p (%x).\n",
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| 196 | it, it->status);
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| 197 |
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| 198 | while (instance->transfers[i].first &&
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| 199 | !(instance->transfers[i].first->status & TD_STATUS_ERROR_ACTIVE)) {
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| 200 | transfer_descriptor_t *transfer = instance->transfers[i].first;
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| 201 | uhci_print_info("Inactive transfer calling callback with status %x.\n",
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| 202 | transfer->status);
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| 203 | instance->transfers[i].first = transfer->next_va;
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| 204 | transfer_descriptor_dispose(transfer);
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| 205 | }
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| 206 | if (!instance->transfers[i].first)
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| 207 | instance->transfers[i].last = instance->transfers[i].first;
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| 208 | }
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| 209 | async_usleep(UHCI_CLEANER_TIMEOUT);
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| 210 | }
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| 211 | return EOK;
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| 212 | }
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| 213 | /*---------------------------------------------------------------------------*/
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| 214 | int uhci_debug_checker(void *arg)
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| 215 | {
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| 216 | uhci_t *instance = (uhci_t*)arg;
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| 217 | assert(instance);
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| 218 | while (1) {
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| 219 | uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
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| 220 | uint16_t sts = pio_read_16(&instance->registers->usbsts);
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| 221 | uhci_print_verbose("Command register: %X Status register: %X\n", cmd, sts);
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| 222 | /*
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| 223 | uintptr_t frame_list = pio_read_32(&instance->registers->flbaseadd);
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| 224 | uhci_print_verbose("Framelist address: %p vs. %p.\n",
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| 225 | frame_list, addr_to_phys(instance->frame_list));
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| 226 | int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
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| 227 | uhci_print_verbose("Framelist item: %d \n", frnum );
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| 228 |
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| 229 | queue_head_t* qh = instance->transfers[USB_TRANSFER_INTERRUPT].queue_head;
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| 230 | uhci_print_verbose("Interrupt QH: %p vs. %p.\n",
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| 231 | instance->frame_list[frnum], addr_to_phys(qh));
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| 232 |
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| 233 | uhci_print_verbose("Control QH: %p vs. %p.\n", qh->next_queue,
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| 234 | addr_to_phys(instance->transfers[USB_TRANSFER_CONTROL].queue_head));
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| 235 | qh = instance->transfers[USB_TRANSFER_CONTROL].queue_head;
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| 236 |
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| 237 | uhci_print_verbose("Bulk QH: %p vs. %p.\n", qh->next_queue,
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| 238 | addr_to_phys(instance->transfers[USB_TRANSFER_BULK].queue_head));
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| 239 | uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
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| 240 | cmd |= UHCI_CMD_RUN_STOP;
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| 241 | pio_write_16(&instance->registers->usbcmd, cmd);
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| 242 | */
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| 243 |
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| 244 | async_usleep(UHCI_DEBUGER_TIMEOUT);
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| 245 | }
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| 246 | return 0;
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| 247 | }
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