1 | /*
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2 | * Copyright (c) 2017 Michal Staruch
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbxhci
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief The host controller transfer ring management
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34 | */
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35 |
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36 | #include <usb/debug.h>
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37 | #include <usb/request.h>
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38 | #include "endpoint.h"
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39 | #include "hc.h"
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40 | #include "hw_struct/trb.h"
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41 | #include "transfers.h"
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42 | #include "trb_ring.h"
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43 |
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44 | typedef enum {
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45 | STAGE_OUT,
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46 | STAGE_IN,
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47 | } stage_dir_flag_t;
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48 |
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49 | #define REQUEST_TYPE_DTD (0x80)
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50 | #define REQUEST_TYPE_IS_DEVICE_TO_HOST(rq) ((rq) & REQUEST_TYPE_DTD)
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51 |
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52 |
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53 | /** Get direction flag of data stage.
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54 | * See Table 7 of xHCI specification.
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55 | */
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56 | static inline stage_dir_flag_t get_status_direction_flag(xhci_trb_t* trb,
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57 | uint8_t bmRequestType, uint16_t wLength)
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58 | {
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59 | /* See Table 7 of xHCI specification */
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60 | return REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) && (wLength > 0)
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61 | ? STAGE_OUT
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62 | : STAGE_IN;
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63 | }
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64 |
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65 | typedef enum {
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66 | DATA_STAGE_NO = 0,
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67 | DATA_STAGE_OUT = 2,
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68 | DATA_STAGE_IN = 3,
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69 | } data_stage_type_t;
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70 |
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71 | /** Get transfer type flag.
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72 | * See Table 8 of xHCI specification.
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73 | */
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74 | static inline data_stage_type_t get_transfer_type(xhci_trb_t* trb, uint8_t
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75 | bmRequestType, uint16_t wLength)
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76 | {
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77 | if (wLength == 0)
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78 | return DATA_STAGE_NO;
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79 |
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80 | /* See Table 7 of xHCI specification */
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81 | return REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType)
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82 | ? DATA_STAGE_IN
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83 | : DATA_STAGE_NO;
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84 | }
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85 |
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86 | static inline bool configure_endpoint_needed(usb_device_request_setup_packet_t *setup)
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87 | {
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88 | usb_request_type_t request_type = SETUP_REQUEST_TYPE_GET_TYPE(setup->request_type);
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89 |
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90 | return request_type == USB_REQUEST_TYPE_STANDARD &&
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91 | (setup->request == USB_DEVREQ_SET_CONFIGURATION
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92 | || setup->request == USB_DEVREQ_SET_INTERFACE);
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93 | }
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94 |
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95 | /**
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96 | * There can currently be only one active transfer, because
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97 | * usb_transfer_batch_init locks the endpoint by endpoint_use.
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98 | * Therefore, we store the only active transfer per endpoint there.
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99 | */
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100 | xhci_transfer_t* xhci_transfer_create(endpoint_t* ep)
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101 | {
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102 | xhci_transfer_t *transfer = calloc(1, sizeof(xhci_transfer_t));
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103 | if (!transfer)
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104 | return NULL;
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105 |
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106 | usb_transfer_batch_init(&transfer->batch, ep);
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107 | return transfer;
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108 | }
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109 |
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110 | void xhci_transfer_destroy(xhci_transfer_t* transfer)
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111 | {
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112 | assert(transfer);
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113 |
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114 | dma_buffer_free(&transfer->hc_buffer);
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115 | free(transfer);
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116 | }
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117 |
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118 | static xhci_trb_ring_t *get_ring(xhci_hc_t *hc, xhci_transfer_t *transfer)
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119 | {
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120 | return &xhci_endpoint_get(transfer->batch.ep)->ring;
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121 | }
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122 |
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123 | static int schedule_control(xhci_hc_t* hc, xhci_transfer_t* transfer)
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124 | {
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125 | usb_transfer_batch_t *batch = &transfer->batch;
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126 | xhci_trb_ring_t *ring = get_ring(hc, transfer);
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127 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(transfer->batch.ep);
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128 |
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129 | usb_device_request_setup_packet_t* setup = &batch->setup.packet;
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130 |
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131 | xhci_trb_t trbs[3];
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132 | int trbs_used = 0;
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133 |
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134 | xhci_trb_t *trb_setup = trbs + trbs_used++;
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135 | xhci_trb_clean(trb_setup);
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136 |
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137 | TRB_CTRL_SET_SETUP_WVALUE(*trb_setup, setup->value);
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138 | TRB_CTRL_SET_SETUP_WLENGTH(*trb_setup, setup->length);
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139 | TRB_CTRL_SET_SETUP_WINDEX(*trb_setup, setup->index);
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140 | TRB_CTRL_SET_SETUP_BREQ(*trb_setup, setup->request);
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141 | TRB_CTRL_SET_SETUP_BMREQTYPE(*trb_setup, setup->request_type);
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142 |
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143 | /* Size of the setup packet is always 8 */
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144 | TRB_CTRL_SET_XFER_LEN(*trb_setup, 8);
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145 |
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146 | /* Immediate data */
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147 | TRB_CTRL_SET_IDT(*trb_setup, 1);
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148 | TRB_CTRL_SET_TRB_TYPE(*trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
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149 | TRB_CTRL_SET_TRT(*trb_setup, get_transfer_type(trb_setup, setup->request_type, setup->length));
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150 |
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151 | /* Data stage */
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152 | xhci_trb_t *trb_data = NULL;
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153 | if (setup->length > 0) {
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154 | trb_data = trbs + trbs_used++;
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155 | xhci_trb_clean(trb_data);
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156 |
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157 | trb_data->parameter = host2xhci(64, transfer->hc_buffer.phys);
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158 |
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159 | // data size (sent for OUT, or buffer size)
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160 | TRB_CTRL_SET_XFER_LEN(*trb_data, batch->buffer_size);
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161 | // FIXME: TD size 4.11.2.4
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162 | TRB_CTRL_SET_TD_SIZE(*trb_data, 1);
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163 |
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164 | // Some more fields here, no idea what they mean
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165 | TRB_CTRL_SET_TRB_TYPE(*trb_data, XHCI_TRB_TYPE_DATA_STAGE);
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166 |
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167 | int stage_dir = REQUEST_TYPE_IS_DEVICE_TO_HOST(setup->request_type)
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168 | ? STAGE_IN : STAGE_OUT;
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169 | TRB_CTRL_SET_DIR(*trb_data, stage_dir);
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170 | }
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171 |
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172 | /* Status stage */
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173 | xhci_trb_t *trb_status = trbs + trbs_used++;
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174 | xhci_trb_clean(trb_status);
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175 |
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176 | // FIXME: Evaluate next TRB? 4.12.3
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177 | // TRB_CTRL_SET_ENT(*trb_status, 1);
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178 |
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179 | TRB_CTRL_SET_IOC(*trb_status, 1);
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180 | TRB_CTRL_SET_TRB_TYPE(*trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
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181 | TRB_CTRL_SET_DIR(*trb_status, get_status_direction_flag(trb_setup, setup->request_type, setup->length));
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182 |
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183 | // Issue a Configure Endpoint command, if needed.
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184 | if (configure_endpoint_needed(setup)) {
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185 | const int err = hc_configure_device(hc, xhci_ep_to_dev(xhci_ep)->slot_id);
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186 | if (err)
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187 | return err;
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188 | }
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189 |
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190 | return xhci_trb_ring_enqueue_multiple(ring, trbs, trbs_used, &transfer->interrupt_trb_phys);
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191 | }
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192 |
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193 | static int schedule_bulk(xhci_hc_t* hc, xhci_transfer_t *transfer)
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194 | {
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195 | xhci_trb_t trb;
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196 | xhci_trb_clean(&trb);
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197 | trb.parameter = host2xhci(64, transfer->hc_buffer.phys);
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198 |
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199 | // data size (sent for OUT, or buffer size)
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200 | TRB_CTRL_SET_XFER_LEN(trb, transfer->batch.buffer_size);
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201 | // FIXME: TD size 4.11.2.4
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202 | TRB_CTRL_SET_TD_SIZE(trb, 1);
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203 |
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204 | // we want an interrupt after this td is done
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205 | TRB_CTRL_SET_IOC(trb, 1);
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206 |
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207 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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208 |
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209 | xhci_trb_ring_t* ring = get_ring(hc, transfer);
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210 |
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211 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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212 | }
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213 |
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214 | static int schedule_interrupt(xhci_hc_t* hc, xhci_transfer_t* transfer)
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215 | {
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216 | xhci_trb_t trb;
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217 | xhci_trb_clean(&trb);
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218 | trb.parameter = host2xhci(64, transfer->hc_buffer.phys);
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219 |
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220 | // data size (sent for OUT, or buffer size)
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221 | TRB_CTRL_SET_XFER_LEN(trb, transfer->batch.buffer_size);
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222 | // FIXME: TD size 4.11.2.4
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223 | TRB_CTRL_SET_TD_SIZE(trb, 1);
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224 |
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225 | // we want an interrupt after this td is done
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226 | TRB_CTRL_SET_IOC(trb, 1);
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227 |
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228 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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229 |
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230 | xhci_trb_ring_t* ring = get_ring(hc, transfer);
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231 |
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232 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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233 | }
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234 |
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235 | static xhci_isoch_transfer_t* isoch_transfer_get_enqueue(xhci_endpoint_t *ep) {
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236 | if ((ep->isoch_enqueue % XHCI_ISOCH_BUFFER_COUNT) == ep->isoch_dequeue) {
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237 | /* None ready */
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238 | return NULL;
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239 | }
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240 | xhci_isoch_transfer_t *isoch_transfer = ep->isoch_transfers[ep->isoch_enqueue];
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241 | ep->isoch_enqueue = (ep->isoch_enqueue + 1) % XHCI_ISOCH_BUFFER_COUNT;
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242 | return isoch_transfer;
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243 | }
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244 |
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245 | static xhci_isoch_transfer_t* isoch_transfer_get_dequeue(xhci_endpoint_t *ep) {
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246 | xhci_isoch_transfer_t *isoch_transfer = ep->isoch_transfers[ep->isoch_dequeue];
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247 | ep->isoch_dequeue = (ep->isoch_dequeue + 1) % XHCI_ISOCH_BUFFER_COUNT;
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248 | return isoch_transfer;
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249 | }
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250 |
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251 | static int schedule_isochronous_trb(xhci_trb_ring_t *ring, xhci_endpoint_t *ep, xhci_trb_t *trb,
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252 | const size_t len, uintptr_t *trb_phys)
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253 | {
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254 | TRB_CTRL_SET_XFER_LEN(*trb, len);
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255 | // FIXME: TD size 4.11.2.4 (there is no next TRB, so 0?)
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256 | TRB_CTRL_SET_TD_SIZE(*trb, 0);
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257 | TRB_CTRL_SET_IOC(*trb, 1);
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258 | TRB_CTRL_SET_TRB_TYPE(*trb, XHCI_TRB_TYPE_ISOCH);
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259 |
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260 | // see 4.14.1 and 4.11.2.3 for the explanation, how to calculate those
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261 | size_t tdpc = len / 1024 + ((len % 1024) ? 1 : 0);
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262 | size_t tbc = tdpc / (ep->max_burst + 1);
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263 | if(!tdpc % (ep->max_burst + 1)) --tbc;
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264 | size_t bsp = tdpc % (ep->max_burst + 1);
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265 | size_t tlbpc = (bsp ? bsp - 1 : ep->max_burst);
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266 |
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267 | TRB_CTRL_SET_TBC(*trb, tbc);
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268 | TRB_CTRL_SET_TLBPC(*trb, tlbpc);
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269 |
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270 | // FIXME: do we want this? 6.4.1.3, p 366 (also possibly frame id?)
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271 | TRB_CTRL_SET_SIA(*trb, 1);
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272 |
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273 | return xhci_trb_ring_enqueue(ring, trb, trb_phys);
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274 | }
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275 |
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276 | static int schedule_isochronous_out(xhci_hc_t* hc, xhci_transfer_t* transfer, xhci_endpoint_t *xhci_ep,
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277 | xhci_device_t *xhci_dev)
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278 | {
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279 | xhci_trb_t trb;
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280 | xhci_trb_clean(&trb);
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281 |
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282 | fibril_mutex_lock(&xhci_ep->isoch_guard);
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283 | xhci_isoch_transfer_t *isoch_transfer = isoch_transfer_get_enqueue(xhci_ep);
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284 | while (!isoch_transfer) {
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285 | fibril_condvar_wait(&xhci_ep->isoch_avail, &xhci_ep->isoch_guard);
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286 | isoch_transfer = isoch_transfer_get_enqueue(xhci_ep);
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287 | }
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288 |
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289 | isoch_transfer->size = transfer->batch.buffer_size;
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290 | if (isoch_transfer->size > 0) {
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291 | memcpy(isoch_transfer->data.virt, transfer->batch.buffer, isoch_transfer->size);
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292 | }
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293 |
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294 | trb.parameter = isoch_transfer->data.phys;
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295 |
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296 | xhci_trb_ring_t *ring = get_ring(hc, transfer);
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297 | int err = schedule_isochronous_trb(ring, xhci_ep, &trb, isoch_transfer->size,
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298 | &isoch_transfer->interrupt_trb_phys);
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299 | if (err) {
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300 | fibril_mutex_unlock(&xhci_ep->isoch_guard);
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301 | return err;
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302 | }
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303 |
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304 | /* If not yet started, start the isochronous endpoint transfers - after buffer count - 1 writes */
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305 | /* The -2 is there because of the enqueue != dequeue check. The buffer must have at least 2 transfers. */
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306 | if (xhci_ep->isoch_enqueue == XHCI_ISOCH_BUFFER_COUNT - 2 && !xhci_ep->isoch_started) {
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307 | const uint8_t slot_id = xhci_dev->slot_id;
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308 | const uint8_t target = xhci_endpoint_index(xhci_ep) + 1; /* EP Doorbells start at 1 */
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309 | err = hc_ring_doorbell(hc, slot_id, target);
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310 | xhci_ep->isoch_started = true;
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311 | }
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312 | fibril_mutex_unlock(&xhci_ep->isoch_guard);
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313 | if (err) {
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314 | return err;
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315 | }
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316 |
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317 | /* Isochronous transfers don't handle errors, they skip them all. */
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318 | transfer->batch.error = EOK;
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319 | transfer->batch.transfered_size = transfer->batch.buffer_size;
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320 | usb_transfer_batch_finish(&transfer->batch);
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321 | return EOK;
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322 | }
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323 |
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324 | static int schedule_isochronous_in(xhci_hc_t* hc, xhci_transfer_t* transfer, xhci_endpoint_t *xhci_ep,
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325 | xhci_device_t *xhci_dev)
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326 | {
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327 | fibril_mutex_lock(&xhci_ep->isoch_guard);
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328 | /* If not yet started, start the isochronous endpoint transfers - before first read */
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329 | if (!xhci_ep->isoch_started) {
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330 | const uint8_t slot_id = xhci_dev->slot_id;
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331 | const uint8_t target = xhci_endpoint_index(xhci_ep) + 1; /* EP Doorbells start at 1 */
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332 | int err = hc_ring_doorbell(hc, slot_id, target);
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333 | if (err) {
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334 | fibril_mutex_unlock(&xhci_ep->isoch_guard);
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335 | return err;
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336 | }
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337 | xhci_ep->isoch_started = true;
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338 | }
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339 |
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340 | xhci_isoch_transfer_t *isoch_transfer = isoch_transfer_get_enqueue(xhci_ep);
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341 | while(!isoch_transfer) {
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342 | fibril_condvar_wait(&xhci_ep->isoch_avail, &xhci_ep->isoch_guard);
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343 | isoch_transfer = isoch_transfer_get_enqueue(xhci_ep);
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344 | }
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345 |
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346 | isoch_transfer->size = transfer->batch.buffer_size;
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347 | if (transfer->batch.buffer_size <= isoch_transfer->size) {
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348 | if (transfer->batch.buffer_size > 0) {
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349 | memcpy(transfer->batch.buffer, isoch_transfer->data.virt, transfer->batch.buffer_size);
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350 | }
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351 | if (transfer->batch.buffer_size < isoch_transfer->size) {
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352 | // FIXME: somehow notify that buffer was too small, probably batch error code
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353 | }
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354 | transfer->batch.transfered_size = transfer->batch.buffer_size;
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355 | }
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356 | else {
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357 | memcpy(transfer->batch.buffer, isoch_transfer->data.virt, isoch_transfer->size);
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358 | transfer->batch.transfered_size = isoch_transfer->size;
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359 | }
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360 |
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361 | // Clear and requeue the transfer with new TRB
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362 | xhci_trb_t trb;
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363 | xhci_trb_clean(&trb);
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364 |
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365 | trb.parameter = isoch_transfer->data.phys;
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366 | isoch_transfer->size = xhci_ep->isoch_max_size;
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367 |
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368 | xhci_trb_ring_t *ring = get_ring(hc, transfer);
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369 | int err = schedule_isochronous_trb(ring, xhci_ep, &trb, isoch_transfer->size,
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370 | &isoch_transfer->interrupt_trb_phys);
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371 | fibril_mutex_unlock(&xhci_ep->isoch_guard);
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372 |
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373 | if (err) {
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374 | return err;
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375 | }
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376 |
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377 | /* Isochronous transfers don't handle errors, they skip them all. */
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378 | transfer->batch.error = EOK;
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379 | usb_transfer_batch_finish(&transfer->batch);
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380 | return EOK;
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381 | }
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382 |
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383 | static int schedule_isochronous(xhci_hc_t* hc, xhci_transfer_t* transfer, xhci_endpoint_t *xhci_ep,
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384 | xhci_device_t *xhci_dev)
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385 | {
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386 | if (transfer->batch.buffer_size > xhci_ep->isoch_max_size) {
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387 | usb_log_error("Cannot schedule an oversized isochronous transfer.");
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388 | return EINVAL;
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389 | }
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390 |
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391 | if (xhci_ep->base.direction == USB_DIRECTION_OUT) {
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392 | return schedule_isochronous_out(hc, transfer, xhci_ep, xhci_dev);
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393 | }
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394 | else {
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395 | return schedule_isochronous_in(hc, transfer, xhci_ep, xhci_dev);
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396 | }
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397 | }
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398 |
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399 | static int handle_isochronous_transfer_event(xhci_hc_t *hc, xhci_trb_t *trb, xhci_endpoint_t *ep) {
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400 | fibril_mutex_lock(&ep->isoch_guard);
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401 |
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402 | int err = EOK;
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403 |
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404 | const xhci_trb_completion_code_t completion_code = TRB_COMPLETION_CODE(*trb);
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405 | switch (completion_code) {
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406 | case XHCI_TRBC_RING_OVERRUN:
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407 | case XHCI_TRBC_RING_UNDERRUN:
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408 | // TODO: abort the phone; rings are unscheduled by xHC by now
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409 | ep->isoch_started = false;
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410 | err = EIO;
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411 | break;
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412 | case XHCI_TRBC_SHORT_PACKET:
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413 | usb_log_debug("Short transfer.");
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414 | /* fallthrough */
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415 | case XHCI_TRBC_SUCCESS:
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416 | break;
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417 | default:
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418 | usb_log_warning("Transfer not successfull: %u", completion_code);
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419 | err = EIO;
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420 | }
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421 |
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422 | xhci_isoch_transfer_t *isoch_transfer = isoch_transfer_get_dequeue(ep);
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423 | if (isoch_transfer->interrupt_trb_phys != trb->parameter) {
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424 | usb_log_error("Non-matching trb to isochronous transfer, skipping.");
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425 | // FIXME: what to do? probably just kill the whole endpoint
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426 | err = ENOENT;
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427 | }
|
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428 |
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429 | if (ep->base.direction == USB_DIRECTION_IN) {
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430 | // We may have received less data, that's fine
|
---|
431 | isoch_transfer->size -= TRB_TRANSFER_LENGTH(*trb);
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432 | }
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433 |
|
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434 | fibril_condvar_signal(&ep->isoch_avail);
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435 | fibril_mutex_unlock(&ep->isoch_guard);
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436 | return err;
|
---|
437 | }
|
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438 |
|
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439 | int xhci_handle_transfer_event(xhci_hc_t* hc, xhci_trb_t* trb)
|
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440 | {
|
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441 | uintptr_t addr = trb->parameter;
|
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442 | const unsigned slot_id = XHCI_DWORD_EXTRACT(trb->control, 31, 24);
|
---|
443 | const unsigned ep_dci = XHCI_DWORD_EXTRACT(trb->control, 20, 16);
|
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444 |
|
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445 | xhci_device_t *dev = hc->bus.devices_by_slot[slot_id];
|
---|
446 | if (!dev) {
|
---|
447 | usb_log_error("Transfer event on disabled slot %u", slot_id);
|
---|
448 | return ENOENT;
|
---|
449 | }
|
---|
450 |
|
---|
451 | const usb_endpoint_t ep_num = ep_dci / 2;
|
---|
452 | xhci_endpoint_t *ep = xhci_device_get_endpoint(dev, ep_num);
|
---|
453 | if (!ep) {
|
---|
454 | usb_log_error("Transfer event on dropped endpoint %u of device "
|
---|
455 | XHCI_DEV_FMT, ep_num, XHCI_DEV_ARGS(*dev));
|
---|
456 | return ENOENT;
|
---|
457 | }
|
---|
458 |
|
---|
459 | /* FIXME: This is racy. Do we care? */
|
---|
460 | ep->ring.dequeue = addr;
|
---|
461 |
|
---|
462 | if (ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS) {
|
---|
463 | return handle_isochronous_transfer_event(hc, trb, ep);
|
---|
464 | }
|
---|
465 |
|
---|
466 | fibril_mutex_lock(&ep->base.guard);
|
---|
467 | usb_transfer_batch_t *batch = ep->base.active_batch;
|
---|
468 | if (!batch) {
|
---|
469 | fibril_mutex_unlock(&ep->base.guard);
|
---|
470 | return ENOENT;
|
---|
471 | }
|
---|
472 |
|
---|
473 | const xhci_trb_completion_code_t completion_code = TRB_COMPLETION_CODE(*trb);
|
---|
474 | switch (completion_code) {
|
---|
475 | case XHCI_TRBC_SHORT_PACKET:
|
---|
476 | usb_log_debug("Short transfer.");
|
---|
477 | /* fallthrough */
|
---|
478 | case XHCI_TRBC_SUCCESS:
|
---|
479 | batch->error = EOK;
|
---|
480 | batch->transfered_size = batch->buffer_size - TRB_TRANSFER_LENGTH(*trb);
|
---|
481 | break;
|
---|
482 |
|
---|
483 | default:
|
---|
484 | usb_log_warning("Transfer not successfull: %u", completion_code);
|
---|
485 | batch->error = EIO;
|
---|
486 | }
|
---|
487 |
|
---|
488 | usb_transfer_batch_reset_toggle(batch);
|
---|
489 | endpoint_deactivate_locked(&ep->base);
|
---|
490 | fibril_mutex_unlock(&ep->base.guard);
|
---|
491 |
|
---|
492 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
|
---|
493 |
|
---|
494 | if (batch->dir == USB_DIRECTION_IN) {
|
---|
495 | assert(batch->buffer);
|
---|
496 | assert(batch->transfered_size <= batch->buffer_size);
|
---|
497 | memcpy(batch->buffer, transfer->hc_buffer.virt, batch->transfered_size);
|
---|
498 | }
|
---|
499 |
|
---|
500 | usb_transfer_batch_finish(batch);
|
---|
501 | return EOK;
|
---|
502 | }
|
---|
503 |
|
---|
504 | typedef int (*transfer_handler)(xhci_hc_t *, xhci_transfer_t *);
|
---|
505 |
|
---|
506 | static const transfer_handler transfer_handlers[] = {
|
---|
507 | [USB_TRANSFER_CONTROL] = schedule_control,
|
---|
508 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
|
---|
509 | [USB_TRANSFER_BULK] = schedule_bulk,
|
---|
510 | [USB_TRANSFER_INTERRUPT] = schedule_interrupt,
|
---|
511 | };
|
---|
512 |
|
---|
513 | int xhci_transfer_schedule(xhci_hc_t *hc, usb_transfer_batch_t *batch)
|
---|
514 | {
|
---|
515 | assert(hc);
|
---|
516 | endpoint_t *ep = batch->ep;
|
---|
517 |
|
---|
518 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
|
---|
519 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
|
---|
520 | xhci_device_t *xhci_dev = xhci_ep_to_dev(xhci_ep);
|
---|
521 |
|
---|
522 | /* Offline devices don't schedule transfers other than on EP0. */
|
---|
523 | if (!xhci_dev->online && ep->endpoint > 0) {
|
---|
524 | return EAGAIN;
|
---|
525 | }
|
---|
526 |
|
---|
527 | // FIXME: find a better way to check if the ring is not initialized
|
---|
528 | if (!xhci_ep->ring.segment_count) {
|
---|
529 | usb_log_error("Ring not initialized for endpoint " XHCI_EP_FMT,
|
---|
530 | XHCI_EP_ARGS(*xhci_ep));
|
---|
531 | return EINVAL;
|
---|
532 | }
|
---|
533 |
|
---|
534 | // Isochronous transfer needs to be handled differently
|
---|
535 | if(batch->ep->transfer_type == USB_TRANSFER_ISOCHRONOUS) {
|
---|
536 | return schedule_isochronous(hc, transfer, xhci_ep, xhci_dev);
|
---|
537 | }
|
---|
538 |
|
---|
539 | const usb_transfer_type_t type = batch->ep->transfer_type;
|
---|
540 | assert(type >= 0 && type < ARRAY_SIZE(transfer_handlers));
|
---|
541 | assert(transfer_handlers[type]);
|
---|
542 |
|
---|
543 | if (batch->buffer_size > 0) {
|
---|
544 | if (dma_buffer_alloc(&transfer->hc_buffer, batch->buffer_size))
|
---|
545 | return ENOMEM;
|
---|
546 | }
|
---|
547 |
|
---|
548 | if (batch->dir != USB_DIRECTION_IN) {
|
---|
549 | // Sending stuff from host to device, we need to copy the actual data.
|
---|
550 | memcpy(transfer->hc_buffer.virt, batch->buffer, batch->buffer_size);
|
---|
551 | }
|
---|
552 |
|
---|
553 | fibril_mutex_lock(&ep->guard);
|
---|
554 | endpoint_activate_locked(ep, batch);
|
---|
555 | const int err = transfer_handlers[batch->ep->transfer_type](hc, transfer);
|
---|
556 |
|
---|
557 | if (err) {
|
---|
558 | endpoint_deactivate_locked(ep);
|
---|
559 | fibril_mutex_unlock(&ep->guard);
|
---|
560 | return err;
|
---|
561 | }
|
---|
562 |
|
---|
563 | /* After the critical section, the transfer can already be finished or aborted. */
|
---|
564 | transfer = NULL; batch = NULL;
|
---|
565 | fibril_mutex_unlock(&ep->guard);
|
---|
566 |
|
---|
567 | const uint8_t slot_id = xhci_dev->slot_id;
|
---|
568 | const uint8_t target = xhci_endpoint_index(xhci_ep) + 1; /* EP Doorbells start at 1 */
|
---|
569 | return hc_ring_doorbell(hc, slot_id, target);
|
---|
570 | }
|
---|