source: mainline/uspace/drv/bus/usb/xhci/hc.h@ 05770666

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 05770666 was 2c0564c, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: handle potentially blocking events in separate fibril

  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 * Copyright (c) 2017 Ondrej Hlavaty
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller data bookkeeping.
34 */
35
36#ifndef XHCI_HC_H
37#define XHCI_HC_H
38
39#include <fibril_synch.h>
40#include <usb/host/usb_transfer_batch.h>
41#include "hw_struct/regs.h"
42#include "hw_struct/context.h"
43#include "scratchpad.h"
44#include "trb_ring.h"
45
46#include "rh.h"
47#include "commands.h"
48#include "bus.h"
49
50typedef struct xhci_command xhci_cmd_t;
51
52typedef struct xhci_hc {
53 /** Common HC device header */
54 hc_device_t base;
55
56 /* MMIO range */
57 addr_range_t mmio_range;
58
59 /* Mapped register sets */
60 void *reg_base;
61 xhci_cap_regs_t *cap_regs;
62 xhci_op_regs_t *op_regs;
63 xhci_rt_regs_t *rt_regs;
64 xhci_doorbell_t *db_arry;
65 xhci_extcap_t *xecp; /**< First extended capability */
66 xhci_legsup_t *legsup; /**< Legacy support capability */
67
68 /* Structures in allocated memory */
69 xhci_event_ring_t event_ring;
70 uint64_t *dcbaa;
71 dma_buffer_t dcbaa_dma;
72 dma_buffer_t scratchpad_array;
73
74 /* Command ring management */
75 xhci_cmd_ring_t cr;
76
77 /* Buffer for events */
78 xhci_sw_ring_t sw_ring;
79
80 struct {
81 fibril_mutex_t guard;
82 fibril_condvar_t cv;
83 bool active;
84 } event_fibril_completion;
85
86 /* Root hub emulation */
87 xhci_rh_t rh;
88
89 /* Bus bookkeeping */
90 xhci_bus_t bus;
91
92 /* Fibril that is currently hanling events */
93 fid_t event_handler;
94
95 /* Cached capabilities */
96 unsigned max_slots;
97 bool ac64;
98 uint64_t wrap_time; /** The last time when mfindex wrap happened */
99 uint64_t wrap_count; /** Amount of mfindex wraps HC has done */
100 unsigned ist; /**< IST in microframes */
101
102 /** Port speed mapping */
103 xhci_port_speed_t speeds [16];
104} xhci_hc_t;
105
106static inline xhci_hc_t *bus_to_hc(bus_t *bus)
107{
108 assert(bus);
109 return member_to_inst(bus, xhci_hc_t, bus);
110}
111
112typedef struct xhci_endpoint xhci_endpoint_t;
113typedef struct xhci_device xhci_device_t;
114
115int hc_init_mmio(xhci_hc_t *, const hw_res_list_parsed_t *);
116int hc_init_memory(xhci_hc_t *, ddf_dev_t *);
117int hc_claim(xhci_hc_t *, ddf_dev_t *);
118int hc_irq_code_gen(irq_code_t *, xhci_hc_t *, const hw_res_list_parsed_t *);
119int hc_start(xhci_hc_t *, bool);
120void hc_fini(xhci_hc_t *);
121void hc_ring_doorbell(xhci_hc_t *, unsigned, unsigned);
122int hc_enable_slot(xhci_hc_t *, uint32_t *);
123int hc_disable_slot(xhci_hc_t *, xhci_device_t *);
124int hc_address_device(xhci_hc_t *, xhci_device_t *, xhci_endpoint_t *);
125int hc_configure_device(xhci_hc_t *, uint32_t);
126int hc_deconfigure_device(xhci_hc_t *, uint32_t);
127int hc_add_endpoint(xhci_hc_t *, uint32_t, uint8_t, xhci_ep_ctx_t *);
128int hc_drop_endpoint(xhci_hc_t *, uint32_t, uint8_t);
129int hc_update_endpoint(xhci_hc_t *, uint32_t, uint8_t, xhci_ep_ctx_t *);
130int hc_stop_endpoint(xhci_hc_t *, uint32_t , uint8_t);
131int hc_reset_endpoint(xhci_hc_t *, uint32_t , uint8_t);
132
133int hc_status(bus_t *, uint32_t *);
134void hc_interrupt(bus_t *, uint32_t);
135
136#endif
137
138/**
139 * @}
140 */
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