source: mainline/uspace/drv/bus/usb/xhci/endpoint.c@ 26beeda

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 26beeda was 51c1d500, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: move HC semantics from endpoint/device to hc module
  • Property mode set to 100644
File size: 11.9 KB
Line 
1/*
2 * Copyright (c) 2017 Petr Manek
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller endpoint management.
34 */
35
36#include <usb/host/endpoint.h>
37#include <usb/descriptor.h>
38
39#include <errno.h>
40#include <macros.h>
41#include <str_error.h>
42
43#include "hc.h"
44#include "bus.h"
45#include "commands.h"
46#include "device.h"
47#include "endpoint.h"
48#include "streams.h"
49
50static int alloc_transfer_ds(xhci_endpoint_t *);
51
52/**
53 * Initialize new XHCI endpoint.
54 * @param[in] xhci_ep Allocated XHCI endpoint to initialize.
55 * @param[in] dev Device, to which the endpoint belongs.
56 * @param[in] desc USB endpoint descriptor carrying configuration data.
57 *
58 * @return Error code.
59 */
60static int xhci_endpoint_init(xhci_endpoint_t *xhci_ep, device_t *dev, const usb_endpoint_descriptors_t *desc)
61{
62 int rc;
63 assert(xhci_ep);
64
65 endpoint_t *ep = &xhci_ep->base;
66
67 endpoint_init(ep, dev, desc);
68
69 xhci_ep->max_burst = desc->companion.max_burst + 1;
70
71 if (ep->transfer_type == USB_TRANSFER_BULK)
72 xhci_ep->max_streams = 1 << (USB_SSC_MAX_STREAMS(desc->companion));
73 else
74 xhci_ep->max_streams = 1;
75
76 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS)
77 xhci_ep->mult = USB_SSC_MULT(desc->companion) + 1;
78 else
79 xhci_ep->mult = 1;
80
81 /* In USB 3, the semantics of wMaxPacketSize changed. Now the number of
82 * packets per service interval is determined from max_burst and mult.
83 */
84 if (dev->speed >= USB_SPEED_SUPER) {
85 ep->packets_per_uframe = xhci_ep->max_burst * xhci_ep->mult;
86 ep->max_transfer_size = ep->max_packet_size * ep->packets_per_uframe;
87 }
88
89 xhci_ep->interval = desc->endpoint.poll_interval;
90
91 /*
92 * Only Low/Full speed interrupt endpoints have interval as a linear field,
93 * others have 2-based log of it.
94 */
95 if (dev->speed >= USB_SPEED_HIGH || ep->transfer_type != USB_TRANSFER_INTERRUPT) {
96 xhci_ep->interval = 1 << (xhci_ep->interval - 1);
97 }
98
99 /* Full speed devices have interval in frames */
100 if (dev->speed <= USB_SPEED_FULL) {
101 xhci_ep->interval *= 8;
102 }
103
104 if (xhci_ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS)
105 isoch_init(xhci_ep, desc);
106
107 if ((rc = alloc_transfer_ds(xhci_ep)))
108 goto err;
109
110 return EOK;
111
112err:
113 return rc;
114}
115
116/**
117 * Create a new xHCI endpoint structure.
118 *
119 * Bus callback.
120 */
121endpoint_t *xhci_endpoint_create(device_t *dev, const usb_endpoint_descriptors_t *desc)
122{
123 const usb_transfer_type_t type = USB_ED_GET_TRANSFER_TYPE(desc->endpoint);
124
125 xhci_endpoint_t *ep = calloc(1, sizeof(xhci_endpoint_t)
126 + (type == USB_TRANSFER_ISOCHRONOUS) * sizeof(*ep->isoch));
127 if (!ep)
128 return NULL;
129
130 if (xhci_endpoint_init(ep, dev, desc)) {
131 free(ep);
132 return NULL;
133 }
134
135 return &ep->base;
136}
137
138/**
139 * Finalize XHCI endpoint.
140 * @param[in] xhci_ep XHCI endpoint to finalize.
141 */
142static void xhci_endpoint_fini(xhci_endpoint_t *xhci_ep)
143{
144 assert(xhci_ep);
145
146 xhci_endpoint_free_transfer_ds(xhci_ep);
147
148 // TODO: Something missed?
149}
150
151/**
152 * Destroy given xHCI endpoint structure.
153 *
154 * Bus callback.
155 */
156void xhci_endpoint_destroy(endpoint_t *ep)
157{
158 xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
159
160 xhci_endpoint_fini(xhci_ep);
161 free(xhci_ep);
162}
163
164
165/**
166 * Register an andpoint to the xHC.
167 *
168 * Bus callback.
169 */
170int xhci_endpoint_register(endpoint_t *ep_base)
171{
172 int err;
173 xhci_endpoint_t *ep = xhci_endpoint_get(ep_base);
174
175 if ((err = hc_add_endpoint(ep)))
176 return err;
177
178 return EOK;
179}
180
181/**
182 * Abort a transfer on an endpoint.
183 */
184static int endpoint_abort(endpoint_t *ep)
185{
186 xhci_device_t *dev = xhci_device_get(ep->device);
187 xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
188
189 usb_transfer_batch_t *batch = NULL;
190 fibril_mutex_lock(&ep->guard);
191 if (ep->active_batch) {
192 if (dev->slot_id) {
193 const int err = hc_stop_endpoint(xhci_ep);
194 if (err) {
195 usb_log_warning("Failed to stop endpoint %u of device " XHCI_DEV_FMT ": %s",
196 ep->endpoint, XHCI_DEV_ARGS(*dev), str_error(err));
197 }
198
199 endpoint_wait_timeout_locked(ep, 2000);
200 }
201
202 batch = ep->active_batch;
203 if (batch) {
204 endpoint_deactivate_locked(ep);
205 }
206 }
207 fibril_mutex_unlock(&ep->guard);
208
209 if (batch) {
210 batch->error = EINTR;
211 batch->transfered_size = 0;
212 usb_transfer_batch_finish(batch);
213 }
214 return EOK;
215}
216
217/**
218 * Unregister an endpoint. If the device is still available, inform the xHC
219 * about it.
220 *
221 * Bus callback.
222 */
223void xhci_endpoint_unregister(endpoint_t *ep_base)
224{
225 int err;
226 xhci_endpoint_t *ep = xhci_endpoint_get(ep_base);
227 xhci_device_t *dev = xhci_device_get(ep_base->device);
228
229 endpoint_abort(ep_base);
230
231 /* If device slot is still available, drop the endpoint. */
232 if (dev->slot_id) {
233
234 if ((err = hc_drop_endpoint(ep))) {
235 usb_log_error("Failed to drop endpoint " XHCI_EP_FMT ": %s", XHCI_EP_ARGS(*ep), str_error(err));
236 }
237 } else {
238 usb_log_debug("Not going to drop endpoint " XHCI_EP_FMT " because"
239 " the slot has already been disabled.", XHCI_EP_ARGS(*ep));
240 }
241}
242
243/**
244 * Determine the type of a XHCI endpoint.
245 * @param[in] ep XHCI endpoint to query.
246 *
247 * @return EP_TYPE_[CONTROL|ISOCH|BULK|INTERRUPT]_[IN|OUT]
248 */
249int xhci_endpoint_type(xhci_endpoint_t *ep)
250{
251 const bool in = ep->base.direction == USB_DIRECTION_IN;
252
253 switch (ep->base.transfer_type) {
254 case USB_TRANSFER_CONTROL:
255 return EP_TYPE_CONTROL;
256
257 case USB_TRANSFER_ISOCHRONOUS:
258 return in ? EP_TYPE_ISOCH_IN
259 : EP_TYPE_ISOCH_OUT;
260
261 case USB_TRANSFER_BULK:
262 return in ? EP_TYPE_BULK_IN
263 : EP_TYPE_BULK_OUT;
264
265 case USB_TRANSFER_INTERRUPT:
266 return in ? EP_TYPE_INTERRUPT_IN
267 : EP_TYPE_INTERRUPT_OUT;
268 }
269
270 return EP_TYPE_INVALID;
271}
272
273/** Allocate transfer data structures for XHCI endpoint not using streams.
274 * @param[in] xhci_ep XHCI endpoint to allocate data structures for.
275 *
276 * @return Error code.
277 */
278static int alloc_transfer_ds(xhci_endpoint_t *xhci_ep)
279{
280 /* Can't use XHCI_EP_FMT because the endpoint may not have device. */
281 usb_log_debug2("Allocating main transfer ring for endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
282
283 xhci_ep->primary_stream_data_array = NULL;
284 xhci_ep->primary_stream_data_size = 0;
285
286 int err;
287 if ((err = xhci_trb_ring_init(&xhci_ep->ring))) {
288 return err;
289 }
290
291 if (xhci_ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS) {
292 if ((err = isoch_alloc_transfers(xhci_ep))) {
293 xhci_trb_ring_fini(&xhci_ep->ring);
294 return err;
295 }
296 }
297
298 return EOK;
299}
300
301/** Free transfer data structures for XHCI endpoint.
302 * @param[in] xhci_ep XHCI endpoint to free data structures for.
303 */
304void xhci_endpoint_free_transfer_ds(xhci_endpoint_t *xhci_ep)
305{
306 if (xhci_ep->primary_stream_data_size) {
307 xhci_stream_free_ds(xhci_ep);
308 } else {
309 usb_log_debug2("Freeing main transfer ring of endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));
310 xhci_trb_ring_fini(&xhci_ep->ring);
311 }
312
313 if (xhci_ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS)
314 isoch_fini(xhci_ep);
315}
316
317xhci_trb_ring_t *xhci_endpoint_get_ring(xhci_endpoint_t *ep, uint32_t stream_id)
318{
319 if (ep->primary_stream_data_size == 0)
320 return stream_id == 0 ? &ep->ring : NULL;
321
322 xhci_stream_data_t *stream_data = xhci_get_stream_ctx_data(ep, stream_id);
323 if (stream_data == NULL) {
324 usb_log_warning("No transfer ring was found for stream %u.", stream_id);
325 return NULL;
326 }
327
328 return &stream_data->ring;
329}
330
331/** Configure endpoint context of a control endpoint.
332 * @param[in] ep XHCI control endpoint.
333 * @param[in] ctx Endpoint context to configure.
334 */
335static void setup_control_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
336{
337 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
338 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size);
339 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
340 XHCI_EP_MULT_SET(*ctx, ep->mult - 1);
341 XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
342 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
343 XHCI_EP_DCS_SET(*ctx, 1);
344}
345
346/** Configure endpoint context of a bulk endpoint.
347 * @param[in] ep XHCI bulk endpoint.
348 * @param[in] ctx Endpoint context to configure.
349 */
350static void setup_bulk_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
351{
352 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
353 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size);
354 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
355 XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
356
357 XHCI_EP_MAX_P_STREAMS_SET(*ctx, 0);
358 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
359 XHCI_EP_DCS_SET(*ctx, 1);
360}
361
362/** Configure endpoint context of a isochronous endpoint.
363 * @param[in] ep XHCI isochronous endpoint.
364 * @param[in] ctx Endpoint context to configure.
365 */
366static void setup_isoch_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
367{
368 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
369 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size & 0x07FF);
370 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
371 XHCI_EP_MULT_SET(*ctx, ep->mult - 1);
372 XHCI_EP_ERROR_COUNT_SET(*ctx, 0);
373 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
374 XHCI_EP_DCS_SET(*ctx, 1);
375 XHCI_EP_INTERVAL_SET(*ctx, fnzb32(ep->interval) % 32);
376
377 XHCI_EP_MAX_ESIT_PAYLOAD_LO_SET(*ctx, ep->isoch->max_size & 0xFFFF);
378 XHCI_EP_MAX_ESIT_PAYLOAD_HI_SET(*ctx, (ep->isoch->max_size >> 16) & 0xFF);
379}
380
381/** Configure endpoint context of a interrupt endpoint.
382 * @param[in] ep XHCI interrupt endpoint.
383 * @param[in] ctx Endpoint context to configure.
384 */
385static void setup_interrupt_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
386{
387 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
388 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size & 0x07FF);
389 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
390 XHCI_EP_MULT_SET(*ctx, 0);
391 XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
392 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
393 XHCI_EP_DCS_SET(*ctx, 1);
394 XHCI_EP_INTERVAL_SET(*ctx, fnzb32(ep->interval) % 32);
395 // TODO: max ESIT payload
396}
397
398/** Type of endpoint context configuration function. */
399typedef void (*setup_ep_ctx_helper)(xhci_endpoint_t *, xhci_ep_ctx_t *);
400
401/** Static array, which maps USB endpoint types to their respective endpoint context configuration functions. */
402static const setup_ep_ctx_helper setup_ep_ctx_helpers[] = {
403 [USB_TRANSFER_CONTROL] = setup_control_ep_ctx,
404 [USB_TRANSFER_ISOCHRONOUS] = setup_isoch_ep_ctx,
405 [USB_TRANSFER_BULK] = setup_bulk_ep_ctx,
406 [USB_TRANSFER_INTERRUPT] = setup_interrupt_ep_ctx,
407};
408
409/** Configure endpoint context of XHCI endpoint.
410 * @param[in] ep Associated XHCI endpoint.
411 * @param[in] ep_ctx Endpoint context to configure.
412 */
413void xhci_setup_endpoint_context(xhci_endpoint_t *ep, xhci_ep_ctx_t *ep_ctx)
414{
415 assert(ep);
416 assert(ep_ctx);
417
418 usb_transfer_type_t tt = ep->base.transfer_type;
419
420 memset(ep_ctx, 0, sizeof(*ep_ctx));
421 setup_ep_ctx_helpers[tt](ep, ep_ctx);
422}
423
424/**
425 * Clear endpoint halt condition by resetting the endpoint and skipping the
426 * offending transfer.
427 */
428int xhci_endpoint_clear_halt(xhci_endpoint_t *ep, uint32_t stream_id)
429{
430 int err;
431
432 if ((err = hc_reset_endpoint(ep)))
433 return err;
434
435 if ((err = hc_reset_ring(ep, stream_id)))
436 return err;
437
438 return EOK;
439}
440
441/**
442 * @}
443 */
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