source: mainline/uspace/drv/bus/usb/xhci/bus.c@ d0db4a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d0db4a0 was add878aa, checked in by Petr Manek <petr.manek@…>, 8 years ago

Added empty implementation of XHCI bus method bodies.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1/*
2 * Copyright (c) 2017 Ondrej Hlavaty <aearsis@eideo.cz>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup libusbhost
29 * @{
30 */
31/** @file
32 * HC Endpoint management.
33 */
34
35#include <usb/host/endpoint.h>
36#include <usb/debug.h>
37
38#include <assert.h>
39#include <errno.h>
40#include <macros.h>
41#include <stdbool.h>
42
43#include "bus.h"
44#include "endpoint.h"
45
46/** Ops receive generic bus_t pointer. */
47static inline xhci_bus_t *bus_to_xhci_bus(bus_t *bus_base)
48{
49 assert(bus_base);
50 return (xhci_bus_t *) bus_base;
51}
52
53static endpoint_t *create_endpoint(bus_t *base)
54{
55 xhci_bus_t *bus = bus_to_xhci_bus(base);
56
57 xhci_endpoint_t *ep = malloc(sizeof(xhci_endpoint_t));
58 if (!ep)
59 return NULL;
60
61 if (xhci_endpoint_init(ep, bus)) {
62 free(ep);
63 return NULL;
64 }
65
66 return &ep->base;
67}
68
69static void destroy_endpoint(endpoint_t *ep)
70{
71 xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
72
73 xhci_endpoint_fini(xhci_ep);
74 free(xhci_ep);
75}
76
77static int register_endpoint(bus_t *bus_base, endpoint_t *ep)
78{
79 // TODO: Implement me!
80 return ENOTSUP;
81}
82
83static int release_endpoint(bus_t *bus_base, endpoint_t *ep)
84{
85 // TODO: Implement me!
86 return ENOTSUP;
87}
88
89static endpoint_t* find_endpoint(bus_t *bus_base, usb_target_t target, usb_direction_t direction)
90{
91 // TODO: Implement me!
92 return NULL;
93}
94
95static int request_address(bus_t *bus_base, usb_address_t *addr, bool strict, usb_speed_t speed)
96{
97 // TODO: Implement me!
98 return ENOTSUP;
99}
100
101static int get_speed(bus_t *bus_base, usb_address_t address, usb_speed_t *speed)
102{
103 // TODO: Implement me!
104 return ENOTSUP;
105}
106
107static int release_address(bus_t *bus_base, usb_address_t address)
108{
109 // TODO: Implement me!
110 return ENOTSUP;
111}
112
113static int reset_toggle(bus_t *bus_base, usb_target_t target, bool all)
114{
115 // TODO: Implement me!
116 return ENOTSUP;
117}
118
119static size_t count_bw(endpoint_t *ep, size_t size)
120{
121 // TODO: Implement me!
122 return 0;
123}
124
125/* Endpoint ops, optional (have generic fallback) */
126static int endpoint_get_toggle(endpoint_t *ep)
127{
128 // TODO: Implement me!
129 return ENOTSUP;
130}
131
132static void endpoint_set_toggle(endpoint_t *ep, unsigned toggle)
133{
134 // TODO: Implement me!
135}
136
137static const bus_ops_t xhci_bus_ops = {
138 .create_endpoint = create_endpoint,
139 .destroy_endpoint = destroy_endpoint,
140
141 .register_endpoint = register_endpoint,
142 .release_endpoint = release_endpoint,
143 .find_endpoint = find_endpoint,
144
145 .request_address = request_address,
146 .get_speed = get_speed,
147 .release_address = release_address,
148 .reset_toggle = reset_toggle,
149
150 .count_bw = count_bw,
151
152 .endpoint_get_toggle = endpoint_get_toggle,
153 .endpoint_set_toggle = endpoint_set_toggle,
154};
155
156int xhci_bus_init(xhci_bus_t *bus, hcd_t *hcd)
157{
158 assert(bus);
159
160 bus_init(&bus->base, hcd);
161
162 bus->base.ops = xhci_bus_ops;
163 return EOK;
164}
165/**
166 * @}
167 */
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