[28ecadb] | 1 | /*
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| 2 | * Copyright (C) 2006 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup ofw
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| 30 | * @{
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| 31 | */
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| 32 | /**
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| 33 | * @file
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| 34 | * @brief EBUS 'reg' and 'ranges' properties handling.
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| 35 | *
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| 36 | */
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| 37 |
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| 38 | #include <genarch/ofw/ofw_tree.h>
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[e2cc9a0] | 39 | #include <arch/drivers/pci.h>
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[28ecadb] | 40 | #include <arch/memstr.h>
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[e2cc9a0] | 41 | #include <arch/trap/interrupt.h>
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[28ecadb] | 42 | #include <func.h>
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| 43 | #include <panic.h>
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[0b414b5] | 44 | #include <debug.h>
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[28ecadb] | 45 | #include <macros.h>
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| 46 |
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[e2cc9a0] | 47 | /** Apply EBUS ranges to EBUS register. */
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[28ecadb] | 48 | bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
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| 49 | {
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| 50 | ofw_tree_property_t *prop;
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| 51 | ofw_ebus_range_t *range;
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| 52 | count_t ranges;
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| 53 |
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| 54 | prop = ofw_tree_getprop(node, "ranges");
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| 55 | if (!prop)
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| 56 | return false;
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| 57 |
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| 58 | ranges = prop->size / sizeof(ofw_ebus_range_t);
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| 59 | range = prop->value;
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| 60 |
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| 61 | int i;
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| 62 |
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| 63 | for (i = 0; i < ranges; i++) {
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| 64 | if (reg->space != range[i].child_space)
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| 65 | continue;
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| 66 | if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
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| 67 | ofw_pci_reg_t pci_reg;
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| 68 |
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| 69 | pci_reg.space = range[i].parent_space;
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| 70 | pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base);
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| 71 | pci_reg.size = reg->size;
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| 72 |
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| 73 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa);
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| 74 | }
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| 75 | }
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| 76 |
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| 77 | return false;
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| 78 | }
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| 79 |
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[233af8c5] | 80 | bool ofw_ebus_map_interrupts(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
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[0b414b5] | 81 | {
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| 82 | ofw_tree_property_t *prop;
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| 83 | ofw_tree_node_t *controller;
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| 84 |
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| 85 | prop = ofw_tree_getprop(node, "interrupt-map");
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| 86 | if (!prop || !prop->value)
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| 87 | return false;
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| 88 |
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| 89 | ofw_ebus_intr_map_t *intr_map = prop->value;
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| 90 | count_t count = prop->size / sizeof(ofw_ebus_intr_map_t);
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| 91 |
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| 92 | ASSERT(count);
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| 93 |
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| 94 | prop = ofw_tree_getprop(node, "interrupt-map-mask");
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| 95 | if (!prop || !prop->value)
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| 96 | return false;
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| 97 |
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| 98 | ofw_ebus_intr_mask_t *intr_mask = prop->value;
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| 99 |
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| 100 | ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t));
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| 101 |
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| 102 | uint32_t space = reg->space & intr_mask->space_mask;
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| 103 | uint32_t addr = reg->addr & intr_mask->addr_mask;
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| 104 | uint32_t intr = interrupt & intr_mask->intr_mask;
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| 105 |
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| 106 | int i;
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| 107 | for (i = 0; i < count; i++) {
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| 108 | if ((intr_map[i].space == space) && (intr_map[i].addr == addr)
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| 109 | && (intr_map[i].intr == intr))
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| 110 | goto found;
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| 111 | }
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| 112 | return false;
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| 113 |
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| 114 | found:
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| 115 | /*
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| 116 | * We found the device that functions as an interrupt controller
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[233af8c5] | 117 | * for the interrupt. We also found mapping from interrupt to INR.
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[e2cc9a0] | 118 | * What needs to be done now is to verify that this indeed is a PCI
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| 119 | * node.
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[0b414b5] | 120 | */
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| 121 |
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| 122 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle);
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[e2cc9a0] | 123 | if (!controller)
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| 124 | return false;
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| 125 |
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| 126 | if (strcmp(ofw_tree_node_name(controller), "pci") != 0) {
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| 127 | /*
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| 128 | * This is not a PCI node.
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| 129 | */
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| 130 | return false;
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| 131 | }
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| 132 |
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| 133 | pci_t *pci = controller->device;
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| 134 | if (!pci) {
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| 135 | pci = pci_init(controller);
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| 136 | if (!pci)
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| 137 | return false;
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| 138 | controller->device = pci;
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| 139 |
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| 140 | }
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| 141 | pci_enable_interrupt(pci, intr_map[i].controller_inr);
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| 142 |
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[233af8c5] | 143 | *inr = intr_map[i].controller_inr;
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[e2cc9a0] | 144 | *inr |= 0x1f << IGN_SHIFT; /* 0x1f is hardwired IGN */
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| 145 |
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[0b414b5] | 146 | return true;
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| 147 | }
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| 148 |
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[28ecadb] | 149 | /** @}
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| 150 | */
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