[28ecadb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[28ecadb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[6404aca] | 29 | /** @addtogroup kernel_genarch
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[28ecadb] | 30 | * @{
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| 31 | */
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| 32 | /**
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| 33 | * @file
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| 34 | * @brief EBUS 'reg' and 'ranges' properties handling.
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| 35 | *
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| 36 | */
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| 37 |
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[63e27ef] | 38 | #include <assert.h>
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[28ecadb] | 39 | #include <genarch/ofw/ofw_tree.h>
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[e731b0d] | 40 | #include <genarch/ofw/ebus.h>
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| 41 | #include <genarch/ofw/pci.h>
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[19f857a] | 42 | #include <str.h>
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[28ecadb] | 43 | #include <panic.h>
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| 44 | #include <macros.h>
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| 45 |
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[e2cc9a0] | 46 | /** Apply EBUS ranges to EBUS register. */
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[8d2760f] | 47 | bool
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| 48 | ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
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[28ecadb] | 49 | {
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| 50 | ofw_tree_property_t *prop;
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| 51 | ofw_ebus_range_t *range;
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[98000fb] | 52 | size_t ranges;
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[28ecadb] | 53 |
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| 54 | prop = ofw_tree_getprop(node, "ranges");
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| 55 | if (!prop)
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| 56 | return false;
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[a35b458] | 57 |
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[28ecadb] | 58 | ranges = prop->size / sizeof(ofw_ebus_range_t);
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| 59 | range = prop->value;
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[a35b458] | 60 |
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[6c441cf8] | 61 | unsigned int i;
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[a35b458] | 62 |
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[28ecadb] | 63 | for (i = 0; i < ranges; i++) {
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| 64 | if (reg->space != range[i].child_space)
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| 65 | continue;
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[8d2760f] | 66 | if (overlaps(reg->addr, reg->size, range[i].child_base,
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| 67 | range[i].size)) {
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[28ecadb] | 68 | ofw_pci_reg_t pci_reg;
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[a35b458] | 69 |
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[28ecadb] | 70 | pci_reg.space = range[i].parent_space;
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[8d2760f] | 71 | pci_reg.addr = range[i].parent_base +
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| 72 | (reg->addr - range[i].child_base);
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[28ecadb] | 73 | pci_reg.size = reg->size;
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[a35b458] | 74 |
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[28ecadb] | 75 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa);
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| 76 | }
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| 77 | }
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| 78 |
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| 79 | return false;
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| 80 | }
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| 81 |
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[8d2760f] | 82 | bool
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| 83 | ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg,
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| 84 | uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
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[0b414b5] | 85 | {
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| 86 | ofw_tree_property_t *prop;
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| 87 | ofw_tree_node_t *controller;
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[a35b458] | 88 |
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[0b414b5] | 89 | prop = ofw_tree_getprop(node, "interrupt-map");
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| 90 | if (!prop || !prop->value)
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| 91 | return false;
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| 92 |
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| 93 | ofw_ebus_intr_map_t *intr_map = prop->value;
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[98000fb] | 94 | size_t count = prop->size / sizeof(ofw_ebus_intr_map_t);
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[a35b458] | 95 |
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[63e27ef] | 96 | assert(count);
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[a35b458] | 97 |
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[0b414b5] | 98 | prop = ofw_tree_getprop(node, "interrupt-map-mask");
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| 99 | if (!prop || !prop->value)
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| 100 | return false;
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[a35b458] | 101 |
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[0b414b5] | 102 | ofw_ebus_intr_mask_t *intr_mask = prop->value;
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[a35b458] | 103 |
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[63e27ef] | 104 | assert(prop->size == sizeof(ofw_ebus_intr_mask_t));
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[a35b458] | 105 |
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[0b414b5] | 106 | uint32_t space = reg->space & intr_mask->space_mask;
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| 107 | uint32_t addr = reg->addr & intr_mask->addr_mask;
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| 108 | uint32_t intr = interrupt & intr_mask->intr_mask;
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[a35b458] | 109 |
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[6c441cf8] | 110 | unsigned int i;
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[0b414b5] | 111 | for (i = 0; i < count; i++) {
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[8d2760f] | 112 | if ((intr_map[i].space == space) &&
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| 113 | (intr_map[i].addr == addr) && (intr_map[i].intr == intr))
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[0b414b5] | 114 | goto found;
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| 115 | }
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| 116 | return false;
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| 117 |
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| 118 | found:
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| 119 | /*
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| 120 | * We found the device that functions as an interrupt controller
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[8d2760f] | 121 | * for the interrupt. We also found partial mapping from interrupt to
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| 122 | * INO.
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[0b414b5] | 123 | */
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| 124 |
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[8d2760f] | 125 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"),
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| 126 | intr_map[i].controller_handle);
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[e2cc9a0] | 127 | if (!controller)
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| 128 | return false;
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[a35b458] | 129 |
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[b60c582] | 130 | if (str_cmp(ofw_tree_node_name(controller), "pci") != 0) {
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[e2cc9a0] | 131 | /*
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| 132 | * This is not a PCI node.
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| 133 | */
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| 134 | return false;
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| 135 | }
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| 136 |
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[33b1903] | 137 | /*
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| 138 | * Let the PCI do the next step in mapping the interrupt.
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| 139 | */
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[8d2760f] | 140 | if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino,
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| 141 | inr, cir, cir_arg))
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[33b1903] | 142 | return false;
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[e2cc9a0] | 143 |
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[0b414b5] | 144 | return true;
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| 145 | }
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| 146 |
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[28ecadb] | 147 | /** @}
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| 148 | */
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