[1141c1a] | 1 | /*
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[3396f59] | 2 | * Copyright (C) 2005 Jakub Vana
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[1141c1a] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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[3396f59] | 27 | *
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[1141c1a] | 28 | */
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| 29 |
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[3396f59] | 30 | #include <fpu_context.h>
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| 31 | #include <arch.h>
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| 32 | #include <cpu.h>
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| 33 |
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| 34 | void fpu_context_save(fpu_context_t *fctx)
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| 35 | {
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[b49f4ae] | 36 | /* Align on 16-byte boundary */
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[3396f59] | 37 | if (((__u64)fctx) & 0xf)
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| 38 | fctx = (fpu_context_t *)((((__u64)fctx) | 0xf) + 1);
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[1141c1a] | 39 |
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[3396f59] | 40 | __asm__ volatile (
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| 41 | "fxsave %0"
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| 42 | : "=m"(*fctx)
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| 43 | );
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| 44 | }
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[1141c1a] | 45 |
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[b49f4ae] | 46 | void fpu_context_restore(fpu_context_t *fctx)
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[3396f59] | 47 | {
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[ffc277e] | 48 | /* Align on 16-byte boundary */
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[3396f59] | 49 | if (((__u64)fctx) & 0xf)
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| 50 | fctx = (fpu_context_t *)((((__u64)fctx) | 0xf) + 1);
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| 51 | __asm__ volatile (
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| 52 | "fxrstor %0"
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| 53 | : "=m"(*fctx)
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| 54 | );
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| 55 | }
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[1141c1a] | 56 |
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[3396f59] | 57 | void fpu_init(void)
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| 58 | {
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[ffc277e] | 59 | /* TODO: Zero all SSE, MMX etc. registers */
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[3396f59] | 60 | __asm__ volatile (
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| 61 | "fninit;"
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| 62 | );
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| 63 | }
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