Changeset 3396f59 in mainline for arch/amd64/src/fpu_context.c

Timestamp:

2005-09-04T08:28:55Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8ff2f3f

Parents:

005384ad

Message:

Fixed gdtr naming issues after ia32 changes.
Fixed stack alignment on new thread to by multiple of 16,
we are now ABI-correct and we do not #GP on va_arg to boot.
Fixed bad exception register names reporting.
Fixed bad _hardcoded_load_addr, which caused allocation of kernel text
frames.

File:

• arch/amd64/src/fpu_context.c (moved) (moved from arch/amd64/include/fpu_context.h ) (2 diffs)

arch/amd64/src/fpu_context.c

@@ -1 +1 @@
 /*
- * Copyright (C) 2005 Martin Decky
+ * Copyright (C) 2005 Jakub Vana
  * All rights reserved.
  *
@@ -25 +25 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
  */
 
-#ifndef __amd64_FPU_CONTEXT_H__
-#define __amd64_FPU_CONTEXT_H__
+#include <fpu_context.h>
+#include <arch.h>
+#include <cpu.h>
 
-#include <arch/types.h>
+void fpu_context_save(fpu_context_t *fctx)
+{
+}
 
-struct fpu_context {
-};
+void fpu_context_restore(fpu_context_t *fctx)
+{
+        if(THREAD==CPU->fpu_owner) 
+                reset_TS_flag();
+        else {
+                set_TS_flag(); 
+                if (CPU->fpu_owner != NULL)
+                        CPU->fpu_owner->fpu_context_engaged=1;
+        }
+}
 
-#endif
+
+void fpu_lazy_context_save(fpu_context_t *fctx)
+{
+        /* TODO: We need malloc that allocates on 16-byte boundary !! */
+        if (((__u64)fctx) & 0xf)
+                fctx = (fpu_context_t *)((((__u64)fctx) | 0xf) + 1);
+
+        __asm__ volatile (
+                "fxsave %0"
+                : "=m"(*fctx)
+                );
+}
+
+void fpu_lazy_context_restore(fpu_context_t *fctx)
+{
+        /* TODO: We need malloc that allocates on 16-byte boundary !! */
+        if (((__u64)fctx) & 0xf)
+                fctx = (fpu_context_t *)((((__u64)fctx) | 0xf) + 1);
+        __asm__ volatile (
+                "fxrstor %0"
+                : "=m"(*fctx)
+                );
+}
+
+void fpu_init(void)
+{
+        __asm__ volatile (
+                "fninit;"
+        );
+}