Changeset edebc15c in mainline for kernel/arch/mips32/include/mm/tlb.h

Timestamp:

2008-07-27T03:50:53Z (17 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

4541ae4

Parents:

5e8ddf5

Message:

physical memory detection in MSIM (discontinous regions supported)
remove Sgi Indy (ARC) support — it was unmaintaned, untested for years and without uspace support

File:

• kernel/arch/mips32/include/mm/tlb.h (modified) (3 diffs)

kernel/arch/mips32/include/mm/tlb.h

@@ -36 +36 @@
 #define KERN_mips32_TLB_H_
 
+#include <arch/types.h>
+#include <typedefs.h>
+#include <arch/mm/asid.h>
 #include <arch/exception.h>
 
@@ -47 +50 @@
 #define TLB_KSTACK_WIRED_INDEX  0
 
-#define TLB_PAGE_MASK_16K       (0x3<<13)
+#define TLB_PAGE_MASK_16K       (0x3 << 13)
 
 #define PAGE_UNCACHED                   2
@@ -160 +163 @@
 extern void tlb_refill(istate_t *istate);
 extern void tlb_modified(istate_t *istate);
+extern void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn);
+extern void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr);
 
 #endif