Changeset b3f8fb7 in mainline for kernel/arch/mips32/include/mm/tlb.h
- Timestamp:
- 2007-01-28T13:25:49Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8e8c1a5
- Parents:
- 1ba41c5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/mm/tlb.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/exception.h> 39 #include <typedefs.h>40 39 41 40 #ifdef TLBCNT … … 53 52 #define PAGE_CACHEABLE_EXC_WRITE 5 54 53 55 typedef union entry_lo entry_lo_t; 56 typedef union entry_hi entry_hi_t; 57 typedef union page_mask page_mask_t; 58 typedef union index tlb_index_t; 59 60 union entry_lo { 54 typedef union { 61 55 struct { 62 56 #ifdef BIG_ENDIAN … … 77 71 } __attribute__ ((packed)); 78 72 uint32_t value; 79 } ;73 } entry_lo_t; 80 74 81 /** Page Table Entry. */ 82 struct pte { 83 unsigned g : 1; /**< Global bit. */ 84 unsigned p : 1; /**< Present bit. */ 85 unsigned d : 1; /**< Dirty bit. */ 86 unsigned cacheable : 1; /**< Cacheable bit. */ 87 unsigned : 1; /**< Unused. */ 88 unsigned soft_valid : 1; /**< Valid content even if not present. */ 89 unsigned pfn : 24; /**< Physical frame number. */ 90 unsigned w : 1; /**< Page writable bit. */ 91 unsigned a : 1; /**< Accessed bit. */ 92 }; 93 94 union entry_hi { 75 typedef union { 95 76 struct { 96 77 #ifdef BIG_ENDIAN … … 105 86 } __attribute__ ((packed)); 106 87 uint32_t value; 107 } ;88 } entry_hi_t; 108 89 109 union page_mask{90 typedef union { 110 91 struct { 111 92 #ifdef BIG_ENDIAN … … 120 101 } __attribute__ ((packed)); 121 102 uint32_t value; 122 } ;103 } page_mask_t; 123 104 124 union index{105 typedef union { 125 106 struct { 126 107 #ifdef BIG_ENDIAN … … 135 116 } __attribute__ ((packed)); 136 117 uint32_t value; 137 } ;118 } tlb_index_t; 138 119 139 120 /** Probe TLB for Matching Entry
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