Changeset e5c8bc6 in mainline for kernel/arch/arm32/src/fpu_context.c

Timestamp:

2012-11-25T01:55:58Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0237380

Parents:

957ce9a5

Message:

arm32, fpu: Make address increments explicit.

File:

• kernel/arch/arm32/src/fpu_context.c (modified) (6 diffs)

kernel/arch/arm32/src/fpu_context.c

@@ -63 +63 @@
         asm volatile (
                 "vmrs r1, fpscr\n"
-                "stm %0, {r1}\n"
-                "vstm %0, {s0-s31}\n"
+                "stmia %0!, {r1}\n"
+                "vstmia %0!, {s0-s31}\n"
                 ::"r" (ctx): "r1","memory"
         );
@@ -76 +76 @@
 {
         asm volatile (
-                "ldm %0, {r1}\n"
+                "ldmia %0!, {r1}\n"
                 "vmsr fpscr, r1\n"
-                "vldm %0, {s0-s31}\n"
+                "vldmia %0!, {s0-s31}\n"
                 ::"r" (ctx): "r1"
         );
@@ -91 +91 @@
         asm volatile (
                 "vmrs r1, fpscr\n"
-                "stm %0, {r1}\n"
-                "vstm %0, {d0-d15}\n"
+                "stmia %0!, {r1}\n"
+                "vstmia %0!, {d0-d15}\n"
                 ::"r" (ctx): "r1","memory"
         );
@@ -104 +104 @@
 {
         asm volatile (
-                "ldm %0, {r1}\n"
+                "ldmia %0!, {r1}\n"
                 "vmsr fpscr, r1\n"
-                "vldm %0, {d0-d15}\n"
+                "vldmia %0!, {d0-d15}\n"
                 ::"r" (ctx): "r1"
         );
@@ -119 +119 @@
         asm volatile (
                 "vmrs r1, fpscr\n"
-                "stm %0, {r1}\n"
-                "vstm %0, {d0-d15}\n"
-                "vstm %0, {d16-d31}\n"
+                "stmia %0!, {r1}\n"
+                "vstmia %0!, {d0-d15}\n"
+                "vstmia %0!, {d16-d31}\n"
                 ::"r" (ctx): "r1","memory"
         );
@@ -133 +133 @@
 {
         asm volatile (
-                "ldm %0, {r1}\n"
+                "ldmia %0!, {r1}\n"
                 "vmsr fpscr, r1\n"
-                "vldm %0, {d0-d15}\n"
-                "vldm %0, {d16-d31}\n"
+                "vldmia %0!, {d0-d15}\n"
+                "vldmia %0!, {d16-d31}\n"
                 ::"r" (ctx): "r1"
         );