Changeset e5c8bc6 in mainline
- Timestamp:
- 2012-11-25T01:55:58Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0237380
- Parents:
- 957ce9a5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/fpu_context.c
r957ce9a5 re5c8bc6 63 63 asm volatile ( 64 64 "vmrs r1, fpscr\n" 65 "stm %0, {r1}\n"66 "vstm %0, {s0-s31}\n"65 "stmia %0!, {r1}\n" 66 "vstmia %0!, {s0-s31}\n" 67 67 ::"r" (ctx): "r1","memory" 68 68 ); … … 76 76 { 77 77 asm volatile ( 78 "ldm %0, {r1}\n"78 "ldmia %0!, {r1}\n" 79 79 "vmsr fpscr, r1\n" 80 "vldm %0, {s0-s31}\n"80 "vldmia %0!, {s0-s31}\n" 81 81 ::"r" (ctx): "r1" 82 82 ); … … 91 91 asm volatile ( 92 92 "vmrs r1, fpscr\n" 93 "stm %0, {r1}\n"94 "vstm %0, {d0-d15}\n"93 "stmia %0!, {r1}\n" 94 "vstmia %0!, {d0-d15}\n" 95 95 ::"r" (ctx): "r1","memory" 96 96 ); … … 104 104 { 105 105 asm volatile ( 106 "ldm %0, {r1}\n"106 "ldmia %0!, {r1}\n" 107 107 "vmsr fpscr, r1\n" 108 "vldm %0, {d0-d15}\n"108 "vldmia %0!, {d0-d15}\n" 109 109 ::"r" (ctx): "r1" 110 110 ); … … 119 119 asm volatile ( 120 120 "vmrs r1, fpscr\n" 121 "stm %0, {r1}\n"122 "vstm %0, {d0-d15}\n"123 "vstm %0, {d16-d31}\n"121 "stmia %0!, {r1}\n" 122 "vstmia %0!, {d0-d15}\n" 123 "vstmia %0!, {d16-d31}\n" 124 124 ::"r" (ctx): "r1","memory" 125 125 ); … … 133 133 { 134 134 asm volatile ( 135 "ldm %0, {r1}\n"135 "ldmia %0!, {r1}\n" 136 136 "vmsr fpscr, r1\n" 137 "vldm %0, {d0-d15}\n"138 "vldm %0, {d16-d31}\n"137 "vldmia %0!, {d0-d15}\n" 138 "vldmia %0!, {d16-d31}\n" 139 139 ::"r" (ctx): "r1" 140 140 );
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