Changeset fcfd002 in mainline for uspace/srv/loader/arch/ia64/_link.ld.in
- Timestamp:
- 2011-04-29T20:59:37Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- c53d906
- Parents:
- bae7bdc
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/srv/loader/arch/ia64/_link.ld.in
rbae7bdc rfcfd002 13 13 } :interp 14 14 15 /* On Itanium code sections must be aligned to 16 bytes. */ 16 . = ALIGN(0x800000000 + SIZEOF_HEADERS, 16); 15 . = 0x800000000 + SIZEOF_HEADERS; 17 16 18 17 .init : { … … 43 42 *(.tdata); 44 43 _tdata_end = .; 45 } :data46 47 .tbss : {48 44 _tbss_start = .; 49 45 *(.tbss); … … 51 47 } :data 52 48 53 _tls_alignment = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss));49 _tls_alignment = ALIGNOF(.tdata); 54 50 55 51 .bss : {
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