Changeset e67c50a in mainline for uspace/drv/bus/usb/ohci/ohci_bus.h

Timestamp:

2018-02-01T21:13:23Z (6 years ago)

Author:

Ondřej Hlavatý <aearsis@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

64ce0c1

Parents:

3e6ff9a

git-author:

Ondřej Hlavatý <aearsis@…> (2018-02-01 21:13:22)

git-committer:

Ondřej Hlavatý <aearsis@…> (2018-02-01 21:13:23)

Message:

ohci: use dma memory responsibly

Instead of leaving arbitrary TD behind to be used by next transfer,
prepare two of them in endpoint and use them in a cyclic manner. This
reduces the number of pages allocated per transfer to one.

File:

• uspace/drv/bus/usb/ohci/ohci_bus.h (modified) (3 diffs)

uspace/drv/bus/usb/ohci/ohci_bus.h

@@ -38 +38 @@
 #include <assert.h>
 #include <adt/list.h>
+#include <usb/dma_buffer.h>
 #include <usb/host/usb2_bus.h>
 
@@ -43 +44 @@
 #include "hw_struct/transfer_descriptor.h"
 
-/** Connector structure linking ED to to prepared TD. */
+/**
+ * Connector structure linking ED to to prepared TD.
+ *
+ * OHCI requires new transfers to be appended at the end of a queue. But it has
+ * a weird semantics of a leftover TD, which serves as a placeholder. This left
+ * TD is overwritten with first TD of a new transfer, and the spare one is used
+ * as the next placeholder. Then the two are swapped for the next transaction.
+ */
 typedef struct ohci_endpoint {
         endpoint_t base;
@@ -49 +57 @@
         /** OHCI endpoint descriptor */
         ed_t *ed;
-        /** Currently enqueued transfer descriptor */
-        td_t *td;
+        /** TDs to be used at the beginning and end of transaction */
+        td_t *tds [2];
+
+        /** Buffer to back ED + 2 TD */
+        dma_buffer_t dma_buffer;
+
         /** Link in endpoint_list*/
         link_t eplist_link;