Ignore:
Timestamp:
2017-08-21T18:46:34Z (7 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6c742f5e
Parents:
c16479e
Message:

riscv64: memory management routines, reflecting the latest Privileged Architecture specification (1.10)

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/riscv64/include/arch/mm/page.h

    rc16479e rccc362a1  
    5050
    5151/*
    52  * Page table entry types.
    53  *
    54  * - PTE_TYPE_PTR:         pointer to next level PTE
    55  * - PTE_TYPE_PTR_GLOBAL:  pointer to next level PTE (global mapping)
    56  *
    57  * - PTE_TYPE_SRURX:       kernel read, user read execute
    58  * - PTE_TYPE_SRWURWX:     kernel read write, user read write execute
    59  * - PTE_TYPE_SRUR:        kernel read, user read
    60  * - PTE_TYPE_SRWURW:      kernel read write, user read write
    61  * - PTE_TYPE_SRXURX:      kernel read execute, user read execute
    62  * - PTE_TYPE_SRWXURWX:    kernel read write execute, user read write execute
    63  *
    64  * - PTE_TYPE_SR:          kernel read
    65  * - PTE_TYPE_SRW:         kernel read write
    66  * - PTE_TYPE_SRX:         kernel read execute
    67  * - PTE_TYPE_SRWX:        kernel read write execute
    68  *
    69  * - PTE_TYPE_SR_GLOBAL:   kernel read (global mapping)
    70  * - PTE_TYPE_SRW_GLOBAL:  kernel read write (global mapping)
    71  * - PTE_TYPE_SRX_GLOBAL:  kernel read execute (global mapping)
    72  * - PTE_TYPE_SRWX_GLOBAL: kernel read write execute (global mapping)
    73  */
    74 
    75 #define PTE_TYPE_PTR          0
    76 #define PTE_TYPE_PTR_GLOBAL   1
    77 
    78 #define PTE_TYPE_SRURX        2
    79 #define PTE_TYPE_SRWURWX      3
    80 #define PTE_TYPE_SRUR         4
    81 #define PTE_TYPE_SRWURW       5
    82 #define PTE_TYPE_SRXURX       6
    83 #define PTE_TYPE_SRWXURWX     7
    84 
    85 #define PTE_TYPE_SR           8
    86 #define PTE_TYPE_SRW          9
    87 #define PTE_TYPE_SRX          10
    88 #define PTE_TYPE_SRWX         11
    89 
    90 #define PTE_TYPE_SR_GLOBAL    12
    91 #define PTE_TYPE_SRW_GLOBAL   13
    92 #define PTE_TYPE_SRX_GLOBAL   14
    93 #define PTE_TYPE_SRWX_GLOBAL  15
    94 
    95 /*
    9652 * Implementation of 4-level page table interface.
    9753 *
    … …  
    12581#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
    12682
     83/* Flags mask for non-leaf page table entries */
     84#define NON_LEAF_MASK  (~(PAGE_READ | PAGE_WRITE | PAGE_EXEC))
     85
    12786/* Get PTE address accessors for each level. */
    12887#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
    … …  
    13998
    14099/* Set PTE address accessors for each level. */
    141 #define SET_PTL0_ADDRESS_ARCH(ptl0)
     100#define SET_PTL0_ADDRESS_ARCH(ptl0) \
     101        (write_satp((uintptr_t) (ptl0)))
    142102
    143103#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
    … …  
    167127
    168128/* Set PTE flags accessors for each level. */
    169 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    170         set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
    171 
    172 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \
    173         set_pt_flags((pte_t *) (ptl1), (size_t) (i), (x))
    174 
    175 #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \
    176         set_pt_flags((pte_t *) (ptl2), (size_t) (i), (x))
    177 
    178 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    179         set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
     129#define SET_PTL1_FLAGS_ARCH(ptl0, i, flags) \
     130        set_pt_flags((pte_t *) (ptl0), (size_t) (i), ((flags) & NON_LEAF_MASK))
     131
     132#define SET_PTL2_FLAGS_ARCH(ptl1, i, flags) \
     133        set_pt_flags((pte_t *) (ptl1), (size_t) (i), ((flags) & NON_LEAF_MASK))
     134
     135#define SET_PTL3_FLAGS_ARCH(ptl2, i, flags) \
     136        set_pt_flags((pte_t *) (ptl2), (size_t) (i), ((flags) & NON_LEAF_MASK))
     137
     138#define SET_FRAME_FLAGS_ARCH(ptl3, i, flags) \
     139        set_pt_flags((pte_t *) (ptl3), (size_t) (i), (flags))
    180140
    181141/* Set PTE present accessors for each level. */
    … …  
    196156#define PTE_PRESENT_ARCH(pte)     ((pte)->valid != 0)
    197157#define PTE_GET_FRAME_ARCH(pte)   ((uintptr_t) (pte)->pfn << 12)
    198 
    199 #define PTE_WRITABLE_ARCH(pte) \
    200         (((pte)->type == PTE_TYPE_SRWURWX) || \
    201         ((pte)->type == PTE_TYPE_SRWURW) || \
    202         ((pte)->type == PTE_TYPE_SRWXURWX))
    203 
    204 #define PTE_EXECUTABLE_ARCH(pte) \
    205         (((pte)->type == PTE_TYPE_SRURX) || \
    206         ((pte)->type == PTE_TYPE_SRWURWX) || \
    207         ((pte)->type == PTE_TYPE_SRXURX) || \
    208         ((pte)->type == PTE_TYPE_SRWXURWX))
     158#define PTE_WRITABLE_ARCH(pte)    ((pte)->writable != 0)
     159#define PTE_EXECUTABLE_ARCH(pte)  ((pte)->executable != 0)
    209160
    210161#ifndef __ASM__
    … …  
    217168typedef struct {
    218169        unsigned long valid : 1;       /**< Valid bit. */
    219         unsigned long type : 4;        /**< Entry type. */
    220         unsigned long referenced : 1;  /**< Refenced bit. */
     170        unsigned long readable : 1;    /**< Readable bit. */
     171        unsigned long writable : 1;    /**< Writable bit. */
     172        unsigned long executable : 1;  /**< Executable bit. */
     173        unsigned long user : 1;        /**< User mode accessible bit. */
     174        unsigned long global : 1;      /**< Global mapping bit. */
     175        unsigned long accessed : 1;    /**< Accessed bit. */
    221176        unsigned long dirty : 1;       /**< Dirty bit. */
    222         unsigned long reserved : 3;    /**< Reserved bits. */
     177        unsigned long reserved : 2;    /**< Reserved bits. */
    223178        unsigned long pfn : 54;        /**< Physical frame number. */
    224179} pte_t;
    … …  
    229184       
    230185        return (((!entry->valid) << PAGE_PRESENT_SHIFT) |
    231             ((entry->type < PTE_TYPE_SR) << PAGE_USER_SHIFT) |
    232             PAGE_READ |
    233             (PTE_WRITABLE_ARCH(entry) << PAGE_WRITE_SHIFT) |
    234             (PTE_EXECUTABLE_ARCH(entry) << PAGE_EXEC_SHIFT) |
    235             ((entry->type >= PTE_TYPE_SR_GLOBAL) << PAGE_GLOBAL_SHIFT));
     186            (entry->user << PAGE_USER_SHIFT) |
     187            (entry->readable << PAGE_READ_SHIFT) |
     188            (entry->writable << PAGE_WRITE_SHIFT) |
     189            (entry->executable << PAGE_EXEC_SHIFT) |
     190            (entry->global << PAGE_GLOBAL_SHIFT));
    236191}
    237192
    … …  
    241196       
    242197        entry->valid = !(flags & PAGE_NOT_PRESENT);
    243        
    244         if ((flags & PAGE_WRITE) != 0) {
    245                 if ((flags & PAGE_EXEC) != 0)
    246                         entry->type = PTE_TYPE_SRWXURWX;
    247                 else
    248                         entry->type = PTE_TYPE_SRWURW;
    249         } else {
    250                 if ((flags & PAGE_EXEC) != 0)
    251                         entry->type = PTE_TYPE_SRXURX;
    252                 else
    253                         entry->type = PTE_TYPE_SRUR;
    254         }
     198        entry->readable = (flags & PAGE_READ) != 0;
     199        entry->writable = (flags & PAGE_WRITE) != 0;
     200        entry->executable = (flags & PAGE_EXEC) != 0;
     201        entry->user = (flags & PAGE_USER) != 0;
     202        entry->global = (flags & PAGE_GLOBAL) != 0;
     203        entry->accessed = 1;
     204        entry->dirty = 1;
    255205}
    256206
    … …  
    264214extern void page_arch_init(void);
    265215extern void page_fault(unsigned int, istate_t *);
     216extern void write_satp(uintptr_t);
    266217
    267218#endif /* __ASM__ */
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