Changeset c8f70eb in mainline for uspace/lib/c/arch/amd64/include/atomic.h

Timestamp:

2011-08-20T17:04:52Z (13 years ago)

Author:

Petr Koupy <petr.koupy@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

ac08cd9

Parents:

81bc309

Message:

pcc incompatible inline assembly rewritten in a more agreeable fashion.

File:

• uspace/lib/c/arch/amd64/include/atomic.h (modified) (5 diffs)

uspace/lib/c/arch/amd64/include/atomic.h

@@ -44 +44 @@
 static inline void atomic_inc(atomic_t *val)
 {
+#ifdef __PCC__
         asm volatile (
                 "lock incq %0\n"
                 : "+m" (val->count)
         );
+#else
+        asm volatile (
+                "lock incq %[count]\n"
+                : [count] "+m" (val->count)
+        );
+#endif
 }
 
 static inline void atomic_dec(atomic_t *val)
 {
+#ifdef __PCC__
         asm volatile (
                 "lock decq %0\n"
                 : "+m" (val->count)
         );
+#else
+        asm volatile (
+                "lock decq %[count]\n"
+                : [count] "+m" (val->count)
+        );
+#endif
 }
 
@@ -62 +76 @@
         atomic_count_t r = 1;
         
+#ifdef __PCC__
         asm volatile (
                 "lock xaddq %1, %0\n"
@@ -67 +82 @@
                   "+r" (r)
         );
+#else
+        asm volatile (
+                "lock xaddq %[r], %[count]\n"
+                : [count] "+m" (val->count),
+                  [r] "+r" (r)
+        );
+#endif
         
         return r;
@@ -75 +97 @@
         atomic_count_t r = -1;
         
+#ifdef __PCC__
         asm volatile (
                 "lock xaddq %1, %0\n"
@@ -80 +103 @@
                   "+r" (r)
         );
+#else
+        asm volatile (
+                "lock xaddq %[r], %[count]\n"
+                : [count] "+m" (val->count),
+                  [r] "+r" (r)
+        );
+#endif
         
         return r;