Changeset c520034 in mainline for kernel/arch/ia64/src/start.S

Timestamp:

2011-12-31T18:19:35Z (12 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

295f658, 77c2b02, 96cd5b4

Parents:

852052d (diff), 22f0561 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Support for kernel non-identity mappings, phase I.

• identity/non-identity kernel memory split on all architectures
• low/high physical memory split on all architectures
• frame allocator understands low/high memory
• high physical memory currently unused (Phase II)
• more compact frame_t
• zone conf frames, pte_t, kernel stacks allocated from low memory
• lockless TLB-miss handlers everywhere (newly sparc64, ia64)
• preallocate PTL1 page tables for non-identity and prevent their deallocation
• hw_map() unification
• new resource allocator used for allocating kernel virtual addresses

Breakage:

• sparc64/sun4v creates too large kernel identity; not fixed because of lack of testing hw
• ppc32's tlb_refill() seems wrong as it creates too large kernel identity, but appears unused and the architecture works normally

Not implemented yet (phase II):

• allow high memory to be used for common kernel allocations

File:

• kernel/arch/ia64/src/start.S (modified) (2 diffs)

kernel/arch/ia64/src/start.S

@@ -38 +38 @@
 #define KERNEL_TRANSLATION_I    0x0010000000000661
 #define KERNEL_TRANSLATION_D    0x0010000000000661
-#define KERNEL_TRANSLATION_VIO  0x0010000000000671
-#define KERNEL_TRANSLATION_IO   0x00100FFFFC000671
-#define KERNEL_TRANSLATION_FW   0x00100000F0000671
 
 .section K_TEXT_START, "ax"
@@ -88 +85 @@
         itr.d dtr[r0] = r10
         
-        movl r7 = 1
-        movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
-        mov cr.ifa = r8
-        movl r10 = (KERNEL_TRANSLATION_VIO)
-        itr.d dtr[r7] = r10
-        
-        mov r11 = cr.itir
-        movl r10 = ~0xfc
-        and r10 = r10, r11
-        movl r11 = (IO_PAGE_WIDTH << PS_SHIFT)
-        or r10 = r10, r11
-        mov cr.itir = r10
-        
-        movl r7 = 2
-        movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
-        mov cr.ifa = r8
-        movl r10 = (KERNEL_TRANSLATION_IO)
-        itr.d dtr[r7] = r10
-        
-        # Setup mapping for firmware area (also SAPIC)
-        
-        mov r11 = cr.itir
-        movl r10 = ~0xfc
-        and r10 = r10, r11
-        movl r11 = (FW_PAGE_WIDTH << PS_SHIFT)
-        or r10 = r10, r11
-        mov cr.itir = r10
-        
-        movl r7 = 3
-        movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET
-        mov cr.ifa = r8
-        movl r10 = (KERNEL_TRANSLATION_FW)
-        itr.d dtr[r7] = r10
-        
-        # Initialize DSR
+        # Initialize DCR
         
         movl r10 = (DCR_DP_MASK | DCR_DK_MASK | DCR_DX_MASK | DCR_DR_MASK | DCR_DA_MASK | DCR_DD_MASK | DCR_LC_MASK)